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Expose the XCR0 register for x86 to allow users to control XSAVE behavior. This register is a bit odd. It's the only one of its type (extended control register), and usually accessed via XGETBV/XSETBV.
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Expose the XCR0 register for x86 to allow users to control XSAVE
behavior. This register is a bit odd. It's the only one of its type
(extended control register), and usually accessed via XGETBV/XSETBV.
Note that neither the existing CR or MSR APIs allow accessing XCR0.
I think that modifying XCR0 can potentially change the BND config,
so I added a call to
cpu_sync_bndcs_hflags.