A translator from Intel SSE intrinsics to Arm/Aarch64 NEON implementation
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Updated
Feb 16, 2026 - C++
A translator from Intel SSE intrinsics to Arm/Aarch64 NEON implementation
Research starter kit for Armv8-A system modeling and benchmarking using the gem5 simulator (education, research)
A simple type-1 hypervisor on Raspberry Pi 3 (aarch64)
Leo Hypervisor. ARM64 Hypervisor on Raspberry Pi 4 machine.
Header-only C library for reading/writing 64-bit Arm registers, automatically generated by parsing the AArch64 System Register XML.
AML's goal is to make benchmarking of various AI architectures on Ampere CPUs a pleasurable experience :)
Camellia cipher SIMD vector implementations for x86 (with AES-NI, VAES and/or GFNI instructions), ARM (with ARMv8 Crypto Extension instructions), POWER (with VMX+VSX+crypto instructions) and RISC-V (RVA23+Zvkb+Zvkned).
RT-Hypervisor: A real-time hypervisor for automotive embedded system
Golang AARCH64 Disassembler
Neutron is a second stage bootloader for ARMv8 based CPUs (part of project Atom)
Automatic correction tool used to grade ARM Assembly student assignments in an academic environment
Program to calculate the value of π (pi) to 1 million digits on Raspberry Pi using ARM64 armv8-a assembly language. Requires 64 bit version of Raspberry Pi OS.
Simple neural network microkernels in C accelerated with ARMv8.2-a Neon vector intrinsics.
Vitis High Level Synthesis Introduction
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