Adding dissagg mode support to Qwen3Moe#682
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quic-hemagnih merged 26 commits intoquic:mainfrom Mar 10, 2026
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ochougul
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ochougul
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@qcdipankar @ochougul Is there anything pending on this PR? @qcdipankar Can you resolve the lint issues and run the CI post that I will merge it. Code wise looks good to me. |
quic-hemagnih
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Feb 24, 2026
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
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Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
ochougul
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Mar 10, 2026
Comment on lines
+41
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| # Following command errors out by default, the user is supposed to run the printed command and provide the generated qpc path as prefill_qpc_path commenting out lines 55-68 | ||
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| # prefill_qpc_path = "" |
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@qcdipankar Can you please take care of this in upcoming PR.
ochougul
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Mar 10, 2026
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Mar 10, 2026
**Adding disagg support to Qwen3Moe** > Config used PL =128 CL=128*3 <img width="726" height="1077" alt="image" src="https://github.com/user-attachments/assets/7b9afa00-8505-4df5-9a91-68b55e89b416" /> --------- Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com>
quic-dhirajku
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Mar 13, 2026
quic#672 **Adding disagg support to Qwen3Moe** > Config used PL =128 CL=128*3 <img width="726" height="1077" alt="image" src="https://github.com/user-attachments/assets/7b9afa00-8505-4df5-9a91-68b55e89b416" /> --------- Signed-off-by: Dipankar Sarkar <dipankar@qti.qualcomm.com> Signed-off-by: Dhiraj Kumar Sah <dhirajku@qti.qualcomm.com>
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#672
Adding disagg support to Qwen3Moe
PL =128
CL=128*3