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[CPU] Cache FullyConnected weigths in scope of compile model #34492

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[CPU] Cache FullyConnected weigths in scope of compile model #34492

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3a9ce3c
[CPU] Cache FullyConnected weigths in scope of compile model
EgorDuplensky Mar 4, 2026
9518d7a
Use actual dst memory in case of tensor parallelism
EgorDuplensky Mar 5, 2026
50e46a1
Correct makeDummyOutputShape shape inference
EgorDuplensky Mar 6, 2026
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11 changes: 6 additions & 5 deletions src/plugins/intel_cpu/src/nodes/executors/dnnl/dnnl_fullyconnected_primitive.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -384,18 +384,19 @@ static VectorDims makeDummyInputDims(const Shape& inShape, const Shape& wShape)
}

static VectorDims makeDummyOutputDims(const VectorDims& inShape, const VectorDims& wShape, const size_t out_rank) {
size_t activationRank = inShape.size();
size_t channelRank = wShape.size() - 1;
const auto wShape2D = reshapeDownToRank<2>(wShape);
const size_t activationRank = inShape.size();
const size_t channelRank = 1;
// activation weight output_shape
// NCHW CoCHW NCo
// TNC CoC TNCo
// NC CoC NCo
VectorDims outputShape(out_rank, 1);
// set Co
outputShape.back() = wShape[0];
outputShape.back() = wShape2D[0];
// set batch dims
size_t batchRank = activationRank - channelRank;
size_t startIdx = out_rank - batchRank - 1;
const size_t batchRank = activationRank - channelRank;
const size_t startIdx = out_rank - batchRank - 1;
for (size_t i = 0; i < batchRank; i++) {
outputShape[i + startIdx] = inShape[i];
}
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2 changes: 1 addition & 1 deletion src/plugins/intel_cpu/src/nodes/executors/fullyconnected_implementations.cpp
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Expand Up @@ -451,7 +451,7 @@ const std::vector<ExecutorImplementation<FCAttrs>>& getImplementations() {
fcMappingNotation);
},
AcceptsAnyShape<FCAttrs>,
CreateDnnlDefault<DnnlFCPrimitive, FCAttrs>{false, true}
CreateDnnlDefault<DnnlFCPrimitive, FCAttrs>{true, true}
)
};

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2 changes: 1 addition & 1 deletion src/plugins/intel_cpu/src/nodes/fullyconnected.cpp
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Expand Up @@ -652,8 +652,8 @@ void FullyConnected::needSplitMemoryForTensorParallel() {
}
memory[ARG_BIAS] = tp_cfg.cached_splited_bias;
// dst
memory[ARG_DST] = getDstMemoryAtPort(0);
tp_cfg.cached_dst = split_horizontal(context->getEngine(), dst, -1, tp_cfg.w_rank, tp_cfg.w_size, false);
memory[ARG_DST] = tp_cfg.cached_dst;

if (auto it = memory.find(ARG_DST | ARG_ATTR_SCALES); it != memory.end()) {
it->second = split_horizontal(context->getEngine(), it->second, 0, tp_cfg.w_rank, tp_cfg.w_size);
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