[rtl] Split data and ECC of the register file#2364
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If I understand correctly, I've looked at some of this change already (where it looked good to me). The only differences since what I've already seen seem to be
That looks really sensible to me, but doesn't this leave |
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Thanks for the review, Rupert!
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As we are switching to a redundancy based fault injection mitigation approach for the register file in the following commits, remove the `WrenCheck` and `RdataMuxCheck` countermeasures from the register file. Signed-off-by: Pascal Nasahl <nasahlpa@lowrisc.org>
Until now, a single instance of the register file containing 32-bit
data words and 7-bit ECC tags was used. While the input of the
register file was driven by the main core, the output of the
register file was distributed to the main and the shadow core.
In this commit, we are splitting up the data and ECC parts into two
different register file instances:
- (1) This instance is driven by the main core and only operates on
the 32-bit data words. The outputs (32-bit data words) are
forwarded to the main and the shadow core.
- (2) This instance is driven by the shadow core and only operates
on the 7-bit ECC words. The 7-bit ECC output is combined with
the delayed 32-bit data output of the (1) RF instance. The
shadow core uses ECC checkers to check if data and ECC (a)
match and (b) are not manipulated using FI.
This helps us to save around 6 kGE of area.
Signed-off-by: Pascal Nasahl <nasahlpa@lowrisc.org>
Due to the new register file split architecture, adapt the DV test accordingly. Target the address of either the main or shadow core register file. Check if we see an ECC error that is generated by the shadow core. Signed-off-by: Pascal Nasahl <nasahlpa@lowrisc.org>
Fix the port name and wait LockstepOffset cycles before reading the alert. Signed-off-by: Pascal Nasahl <nasahlpa@lowrisc.org>
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I think this PR is good to go in. But maybe @rswarbrick wants to take another look? @nasahlpa can you confirm that you addressed all points raised by @rswarbrick in this comment #2364 (comment) please? |
Yes, I have addressed the comments as mentioned here. |
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Looks good to me. Thanks, @nasahlpa, for replying to my questions (and sorry for not acking!)
Until now, a single instance of the register file containing 32-bit data words and 7-bit ECC tags was used. While the input of the register file was driven by the main core, the output of the register file was distributed to the main and the shadow core.
In this PR, we are splitting up the data and ECC parts into two different register file instances:
This helps us to save around 6 kGE of area.