EDA/CAD automation engineer with experience at Siemens EDA (Calibre PERC, DRC/LVS automation) and AMD (post-silicon validation for Ryzen). I build Python/Tcl/Shell tooling that makes silicon verification and debug workflows faster and more reliable. MS in Electrical Engineering, RIT (MEMS specialization).
Currently exploring agentic AI systems for semiconductor debug, RF/PCB design, and open-source IC design with SKY130.
- triagent — Agentic RAG-based log triage system for semiconductor debug workflows. Built with FAISS, Drain3, Ollama, and local LLMs. Designed to cut down the time engineers spend chasing failures across post-silicon logs.
- RF PCB design in KiCAD 9 (microstrip, CPW, via fencing, 50Ω matching)
- Open-source analog/RF IC design flow with SKY130 PDK (Xschem, ngspice, Magic, KLayout)
- EDA/CAD automation — Calibre PERC rule decks, DRC/LVS flow automation, Python/Tcl/Shell tooling for physical verification
- Post-silicon validation — ESD test engineering and validation automation on Ryzen processors at AMD
- Languages & tools — Python, Tcl, Shell, Linux, Git, FAISS, LangGraph, Ollama, KiCAD, Cadence Virtuoso (learning)
EDA CAD Automation roles at semiconductor companies. Open to RF test engineering and AI-for-EDA positions where Python automation + silicon domain knowledge matter.
- LinkedIn: chinmayrozekar
- GitHub: @chinmayrozekar
- X: @ChinmayRozekar