Add Wishbone-attached CORDIC accelerator peripheral

[kirupanithi7899]

Summary

This pull request adds a simple CORDIC accelerator peripheral to Microwatt, integrated via the existing Wishbone I/O bus.

Changes

• Added a standalone CORDIC compute core (peripherals/cordic/cordic.vhdl)
• Added a Wishbone wrapper exposing memory-mapped control and data registers (peripherals/cordic/cordic_wb.vhdl)
• Integrated the CORDIC peripheral into soc.vhdl with address decoding and Wishbone wiring

Status

• Builds successfully with the existing Microwatt SoC
• Peripheral is accessible from software via MMIO

Notes / Future Work

• Software test coverage and documentation can be expanded
• Interrupt support could be added later (currently polling-based)

Feedback on integration style and preferred verification approach is welcome.

Contributors & Affiliation

This work was carried out as part of a collaborative accelerator integration effort.

Contributors

• Sumanto Kar — Assistant Project Manager, FOSSEE Project, IIT Bombay
• Aditya Minocha — Project Research Assistant, FOSSEE Project, IIT Bombay
• Kirupanithi — Design Engineer, Object Automation System Solution Pvt. Ltd., Chennai

Organization

FOSSEE (Free/Libre and Open Source Software for Education) Project
Indian Institute of Technology Bombay (IIT Bombay)