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Staging/xlnx/ad9081 jrx update #3123

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ce69a60
iio: adc: ad9081: Add JESD204C RX foreground calibration status check
mhennerich Jan 30, 2026
03af404
iio: adc: ad9081: Replace multichip_sync 204C recalibration with debu…
mhennerich Jan 13, 2026
0314d2c
iio: adc: ad9081: Add debugfs entries for JRX TPL phase adjust
mhennerich Feb 2, 2026
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114 changes: 111 additions & 3 deletions drivers/iio/adc/ad9081.c
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Original file line number Diff line number Diff line change
Expand Up @@ -152,6 +152,9 @@
DBGFS_BIST_PRBS_JTX,
DBGFS_DEV_API_INFO,
DBGFS_DEV_CHIP_INFO,
DBGFS_JESD_RX_RECAL_204C,
DBGFS_JRX_LMFC_DELAY_LINK0,
DBGFS_JRX_LMFC_DELAY_LINK1,
DBGFS_ENTRY_MAX,
};

Expand Down Expand Up @@ -637,7 +640,7 @@
static long ad9081_bb_round_rate(struct clk_hw *hw, unsigned long rate,
unsigned long *prate)
{
struct ad9081_clock *clk_priv = to_clk_priv(hw);

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clang_analyzer: Value stored to 'clk_priv' during its initialization is never read [deadcode.DeadStores]
643 | struct ad9081_clock *clk_priv = to_clk_priv(hw);
| ^~~~~~~~ ~~~~~~~~~~~~~~~

dev_dbg(&clk_priv->spi->dev, "%s: Rate %lu Hz", __func__, rate);

Expand Down Expand Up @@ -2624,9 +2627,6 @@
jesd204_fsm_stop(phy->jdev, JESD204_LINKS_ALL);
jesd204_fsm_clear_errors(phy->jdev, JESD204_LINKS_ALL);
return jesd204_fsm_start(phy->jdev, JESD204_LINKS_ALL);
case 20:
return adi_ad9081_jesd_rx_calibrate_204c(&phy->ad9081, 1,
phy->ad9081.serdes_info.des_settings.boost_mask, 1);
default:
return -EINVAL;
}
Expand Down Expand Up @@ -3259,7 +3259,7 @@
struct ad9081_phy *phy =
container_of(work, struct ad9081_phy, dwork.work);

ret = adi_ad9081_hal_reg_get(&phy->ad9081, REG_IRQ_STATUS0_ADDR,

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3262 | ret = adi_ad9081_hal_reg_get(&phy->ad9081, REG_IRQ_STATUS0_ADDR,
| ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
3263 | &status);
| ~~~~~~~~
&status);

if (!(status & BIT(6))) {
Expand Down Expand Up @@ -3643,7 +3643,7 @@

for (j = 0; j < 8; j++)
if (phy->jrx_link_tx[0].logiclane_mapping[j] == i) {
ret = adi_ad9081_jesd_rx_phy_prbs_test_result_get(

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clang_analyzer: Value stored to 'ret' is never read [deadcode.DeadStores]
3646 | ret = adi_ad9081_jesd_rx_phy_prbs_test_result_get(
| ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
3647 | &phy->ad9081, j, &prbs_rx_result);
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
&phy->ad9081, j, &prbs_rx_result);

len += snprintf(phy->dbuf + len, sizeof(phy->dbuf), "%u/%u ",
Expand All @@ -3659,7 +3659,7 @@

for (j = 0; j < 8; j++)
if (phy->jrx_link_tx[1].logiclane_mapping[j] == i) {
ret = adi_ad9081_jesd_rx_phy_prbs_test_result_get(&phy->ad9081,

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3662 | ret = adi_ad9081_jesd_rx_phy_prbs_test_result_get(&phy->ad9081,
| ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
3663 | j, &prbs_rx_result);
| ~~~~~~~~~~~~~~~~~~~
j, &prbs_rx_result);

len += snprintf(phy->dbuf + len, sizeof(phy->dbuf), "%u/%u ",
Expand Down Expand Up @@ -3722,7 +3722,7 @@
lane, spo_steps, phy->jrx_link_tx[0].lane_rate_kbps);

for (i = 0; i < (spo_steps * 3); i += 3)
if (eye_data[i + 1] || eye_data[i + 2])

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3725 | if (eye_data[i + 1] || eye_data[i + 2])
| ^~~~~~~~~~~~~~~
len += snprintf(phy->dbuf + len,
sizeof(phy->dbuf),
"%d,%d,%d\n", eye_data[i],
Expand All @@ -3743,6 +3743,12 @@
len = snprintf(phy->dbuf, sizeof(phy->dbuf), "AD%X Rev. %u Grade %u\n",
conv->id, phy->chip_id.dev_revision, phy->chip_id.prod_grade);
break;
case DBGFS_JRX_LMFC_DELAY_LINK0:
val = phy->jrx_link_tx[0].jrx_tpl_phase_adjust;
break;
case DBGFS_JRX_LMFC_DELAY_LINK1:
val = phy->jrx_link_tx[1].jrx_tpl_phase_adjust;
break;
default:
val = entry->val;
}
Expand Down Expand Up @@ -3870,6 +3876,64 @@
entry->val = val3 << 16 | (val2 & 0xFF) << 8 | (val & 0xFF);

return count;
case DBGFS_JESD_RX_RECAL_204C: {
adi_ad9081_jrx_fg_cal_result_t fg_cal_res;

if (val != 1)
return -EINVAL;

if (phy->jrx_link_tx[0].jesd_param.jesd_jesdv != JESD204_VERSION_C)
return -ENOTSUPP;

if (phy->jrx_link_tx[0].lane_rate_kbps <=
(AD9081_JESDRX_204C_CAL_THRESH / 1000))
return -ERANGE;

ret = adi_ad9081_jesd_rx_link_enable_set(&phy->ad9081,
ad9081_link_sel(phy->jrx_link_tx), 1);
if (ret != 0)
return ret;

dev_info(&phy->spi->dev, "running jesd_rx_calibrate_204c, LR %lu kbps",
phy->jrx_link_tx[0].lane_rate_kbps);
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@nunojsa nunojsa Feb 13, 2026

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Kind of a nitpick but I would put the above as dbg()


ret = adi_ad9081_jesd_rx_calibrate_204c(&phy->ad9081, 1,
phy->ad9081.serdes_info.des_settings.boost_mask, 1);
if (ret < 0)
return ret;

ret = adi_ad9081_jesd_rx_calibrate_204c_status_get(
&phy->ad9081, &fg_cal_res);
if (ret < 0)
return ret;

if (!fg_cal_res.status) {
dev_err(&phy->spi->dev, "jesd_rx_calibrate_204c failed, failed lane mask 0x%02x\n",
fg_cal_res.failed_mask);
} else {
dev_info(&phy->spi->dev, "jesd_rx_calibrate_204c success, goodness %u, SPO L %u, SPO R %u\n",
fg_cal_res.goodness,
fg_cal_res.spo_left,
fg_cal_res.spo_right);
}

ret = adi_ad9081_jesd_rx_link_enable_set(&phy->ad9081,
ad9081_link_sel(phy->jrx_link_tx), 0);
if (ret != 0)
return ret;

msleep(10);
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@nunojsa nunojsa Feb 13, 2026

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fsleep()


ret = adi_ad9081_jesd_rx_link_enable_set(&phy->ad9081,
ad9081_link_sel(phy->jrx_link_tx), 1);
if (ret != 0)
return ret;

if (!fg_cal_res.status)
return -EFAULT;

return count;
}
case DBGFS_BIST_JRX_SPO_SWEEP:
if (ret < 2)
return -EINVAL;
Expand All @@ -3891,6 +3955,26 @@

entry->val = lv << 16 | rv;

return count;
case DBGFS_JRX_LMFC_DELAY_LINK0:
if (ret < 1)
return -EINVAL;

phy->jrx_link_tx[0].jrx_tpl_phase_adjust = val;
ret = adi_ad9081_jesd_rx_lmfc_delay_set(&phy->ad9081, AD9081_LINK_0, val);
if (ret)
return ret;

return count;
case DBGFS_JRX_LMFC_DELAY_LINK1:
if (ret < 1)
return -EINVAL;

phy->jrx_link_tx[1].jrx_tpl_phase_adjust = val;
ret = adi_ad9081_jesd_rx_lmfc_delay_set(&phy->ad9081, AD9081_LINK_1, val);
if (ret)
return ret;

return count;
default:
break;
Expand Down Expand Up @@ -3973,6 +4057,12 @@
"api_version", DBGFS_DEV_API_INFO);
ad9081_add_debugfs_entry(indio_dev,
"chip_version", DBGFS_DEV_CHIP_INFO);
ad9081_add_debugfs_entry(indio_dev,
"jesd_rx_recalibrate_204c", DBGFS_JESD_RX_RECAL_204C);
ad9081_add_debugfs_entry(indio_dev,
"adi,tpl-phase-adjust-link0", DBGFS_JRX_LMFC_DELAY_LINK0);
ad9081_add_debugfs_entry(indio_dev,
"adi,tpl-phase-adjust-link1", DBGFS_JRX_LMFC_DELAY_LINK1);

for (i = 0; i < phy->ad9081_debugfs_entry_index; i++)
debugfs_create_file( phy->debugfs_entry[i].propname, 0644,
Expand Down Expand Up @@ -4925,7 +5015,7 @@
enum jesd204_state_op_reason reason,
struct jesd204_link *lnk)
{
struct device *dev = jesd204_dev_to_device(jdev);

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5018 | struct device *dev = jesd204_dev_to_device(jdev);
| ^~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~
struct ad9081_jesd204_priv *priv = jesd204_dev_priv(jdev);
struct ad9081_phy *phy = priv->phy;
struct ad9081_jesd_link *link;
Expand All @@ -4942,7 +5032,7 @@

switch (lnk->link_id) {
case DEFRAMER_LINK0_TX:
case DEFRAMER_LINK1_TX:

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+			ret = adi_ad9081_jesd_rx_calibrate_204c_status_get(
if (phy->tx_disable)
return -ENODEV;
link = &phy->jrx_link_tx[0];
Expand All @@ -4951,7 +5041,7 @@
break;
case FRAMER_LINK0_RX:
case FRAMER_LINK1_RX:
if (phy->rx_disable)

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+				return -EFAULT;
+			} else {
return -ENODEV;
link = &phy->jtx_link_rx[lnk->link_id - FRAMER_LINK0_RX];
lnk->sample_rate = phy->adc_frequency_hz;
Expand Down Expand Up @@ -5017,6 +5107,8 @@
phy->jrx_link_tx[0].lane_cal_rate_kbps !=
phy->jrx_link_tx[0].lane_rate_kbps) {

adi_ad9081_jrx_fg_cal_result_t fg_cal_res;

ret = adi_ad9081_jesd_rx_link_enable_set(&phy->ad9081,
ad9081_link_sel(phy->jrx_link_tx), 1);
if (ret != 0)
Expand All @@ -5030,6 +5122,22 @@
if (ret < 0)
return ret;

ret = adi_ad9081_jesd_rx_calibrate_204c_status_get(
&phy->ad9081, &fg_cal_res);
if (ret < 0)
return ret;

if (!fg_cal_res.status) {
dev_err(dev, "jesd_rx_calibrate_204c failed, failed lane mask 0x%02x\n",
fg_cal_res.failed_mask);
return -EFAULT;
} else {
dev_info(dev, "jesd_rx_calibrate_204c success, goodness %u, SPO L %u, SPO R %u\n",
fg_cal_res.goodness,
fg_cal_res.spo_left,
fg_cal_res.spo_right);
}

ret = adi_ad9081_jesd_rx_link_enable_set(&phy->ad9081,
ad9081_link_sel(phy->jrx_link_tx), 0);
if (ret != 0)
Expand All @@ -5056,7 +5164,7 @@
enum jesd204_state_op_reason reason,
struct jesd204_link *lnk)
{
struct device *dev = jesd204_dev_to_device(jdev);

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5167 | struct device *dev = jesd204_dev_to_device(jdev);
| ^~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~
struct ad9081_jesd204_priv *priv = jesd204_dev_priv(jdev);
struct ad9081_phy *phy = priv->phy;
int ret;
Expand All @@ -5079,7 +5187,7 @@
enum jesd204_state_op_reason reason,
struct jesd204_link *lnk)
{
struct device *dev = jesd204_dev_to_device(jdev);

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5190 | struct device *dev = jesd204_dev_to_device(jdev);
| ^~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~
struct ad9081_jesd204_priv *priv = jesd204_dev_priv(jdev);
struct ad9081_phy *phy = priv->phy;
int ret;
Expand Down Expand Up @@ -5123,7 +5231,7 @@

static int ad9081_jesd204_uninit(struct jesd204_dev *jdev, enum jesd204_state_op_reason reason)
{
struct device *dev = jesd204_dev_to_device(jdev);

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5234 | struct device *dev = jesd204_dev_to_device(jdev);
| ^~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~

if (reason != JESD204_STATE_OP_REASON_UNINIT)
return JESD204_STATE_CHANGE_DONE;
Expand All @@ -5136,7 +5244,7 @@
static int ad9081_jesd204_setup_stage1(struct jesd204_dev *jdev,
enum jesd204_state_op_reason reason)
{
struct device *dev = jesd204_dev_to_device(jdev);

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5247 | struct device *dev = jesd204_dev_to_device(jdev);
| ^~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~
struct ad9081_jesd204_priv *priv = jesd204_dev_priv(jdev);
struct ad9081_phy *phy = priv->phy;
adi_cms_jesd_subclass_e subclass = JESD_SUBCLASS_0;
Expand Down
36 changes: 36 additions & 0 deletions drivers/iio/adc/ad9081/adi_ad9081.h
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Expand Up @@ -753,6 +753,17 @@
uint8_t right_spo; /*!< Right good SPO */
} adi_ad9081_spo_t;

/*!
* @brief JESD RX Foreground Calibration Result Structure
*/
typedef struct {

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+typedef struct {
uint8_t status; /*!< Calibration status (1 = good, 0 = failed) */

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+    uint8_t  status;                                /*!< Calibration status (1 = good, 0 = failed) */

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+    uint8_t  status;                                /*!< Calibration status (1 = good, 0 = failed) */$
uint8_t failed_mask; /*!< Bitmask of failed lanes */

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+    uint8_t  failed_mask;                           /*!< Bitmask of failed lanes */

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+    uint8_t  failed_mask;                           /*!< Bitmask of failed lanes */$
uint16_t goodness; /*!< Calibration goodness metric */

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+    uint16_t goodness;                              /*!< Calibration goodness metric */

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+    uint16_t goodness;                              /*!< Calibration goodness metric */$
uint8_t spo_left; /*!< Left SPO value */

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+    uint8_t  spo_left;                              /*!< Left SPO value */$
uint8_t spo_right; /*!< Right SPO value */
} adi_ad9081_jrx_fg_cal_result_t;

/*!
* @brief Enumerates JESD Serializer Swing Settings
*/
Expand Down Expand Up @@ -4220,6 +4231,31 @@
uint8_t boost_mask,
uint8_t run_bg_cal);

/**
* @ingroup rx_setup
* @brief Get 204C calibration status for a single physical lane
*
* @param device Pointer to the device structure
* @param physical_lane Physical lane index, 0 ~ 7
* @param res Pointer to calibration result structure
*
* @return API_CMS_ERROR_OK API Completed Successfully
* @return <0 Failed. @see adi_cms_error_e for details.
*/
int32_t adi_ad9081_jesd_rx_calibrate_204c_lane_status_get(adi_ad9081_device_t *device, uint8_t physical_lane, adi_ad9081_jrx_fg_cal_result_t *res);

/**
* @ingroup rx_setup
* @brief Get 204C foreground calibration status for all active lanes
*
* @param device Pointer to the device structure
* @param res Pointer to calibration result structure with worst-case values across all active lanes
*
* @return API_CMS_ERROR_OK API Completed Successfully
* @return <0 Failed. @see adi_cms_error_e for details.
*/
int32_t adi_ad9081_jesd_rx_calibrate_204c_status_get(adi_ad9081_device_t *device, adi_ad9081_jrx_fg_cal_result_t *res);

/**
* @ingroup link_setup
* @brief System Top Level API. \n High level API for Master-Slave NCO Sync
Expand Down
79 changes: 79 additions & 0 deletions drivers/iio/adc/ad9081/adi_ad9081_jesd.c
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Expand Up @@ -420,7 +420,7 @@
return API_CMS_ERROR_OK;
}

int32_t adi_ad9081_jesd_rx_firmware_version_get(adi_ad9081_device_t *device,

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423 | int32_t adi_ad9081_jesd_rx_firmware_version_get(adi_ad9081_device_t *device,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

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 423 | int32_t adi_ad9081_jesd_rx_firmware_version_get(adi_ad9081_device_t *device,
 | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
uint8_t *major, uint8_t *minor)
{
int32_t err;
Expand Down Expand Up @@ -490,7 +490,7 @@
return API_CMS_ERROR_OK;
}

int32_t adi_ad9081_jesd_cal_boot_wait(adi_ad9081_device_t *device)

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493 | int32_t adi_ad9081_jesd_cal_boot_wait(adi_ad9081_device_t *device)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~

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 493 | int32_t adi_ad9081_jesd_cal_boot_wait(adi_ad9081_device_t *device)
 | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
{
int32_t err;
uint16_t rx_set_state1_addr, rx_scratch0_addr;
Expand All @@ -510,11 +510,11 @@
}

/* patched code */
err = adi_ad9081_hal_reg_set(device, rx_scratch0_addr, 0xaa);

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AD9081_ERROR_RETURN(err);

/* if set to high, will reset tracking structures and register maps. self clears bit for acknowledgment. */
err = adi_ad9081_hal_reg_set(device, rx_set_state1_addr, 0x80);

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AD9081_ERROR_RETURN(err);

for (i = 0; i < max_wait; i++) {
Expand Down Expand Up @@ -546,7 +546,7 @@
return API_CMS_ERROR_OK;
}

int32_t adi_ad9081_jesd_cal_manual_call(adi_ad9081_device_t *device,

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549 | int32_t adi_ad9081_jesd_cal_manual_call(adi_ad9081_device_t *device,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

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kernel_sparse: no previous prototype for 'adi_ad9081_jesd_cal_manual_call' [-Wmissing-prototypes]
 549 | int32_t adi_ad9081_jesd_cal_manual_call(adi_ad9081_device_t *device,
 | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
uint8_t state)
{
int32_t err;
Expand Down Expand Up @@ -596,7 +596,7 @@
return API_CMS_ERROR_OK;
}

int32_t adi_ad9081_jesd_cal_fg_cal_wait(adi_ad9081_device_t *device)

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gcc_fanalayzer: no previous prototype for 'adi_ad9081_jesd_cal_fg_cal_wait' [-Wmissing-prototypes]
599 | int32_t adi_ad9081_jesd_cal_fg_cal_wait(adi_ad9081_device_t *device)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

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kernel_sparse: no previous prototype for 'adi_ad9081_jesd_cal_fg_cal_wait' [-Wmissing-prototypes]
 599 | int32_t adi_ad9081_jesd_cal_fg_cal_wait(adi_ad9081_device_t *device)
 | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
{
int32_t err;
uint8_t i, jrx_at_idle, rx_bg_cal_run;
Expand Down Expand Up @@ -658,7 +658,7 @@
rx_set_state1_addr = 0x21c1;
}

err = adi_ad9081_hal_bf_set(device, rx_set_state1_addr, 0x0103,

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kernel_smatch: uninitialized symbol 'rx_set_state1_addr'.
0x0); /* rx_bg_cal_run = 0 */
AD9081_ERROR_RETURN(err);

Expand Down Expand Up @@ -699,7 +699,7 @@
rx_set_state1_addr = 0x21c1;
}

err = adi_ad9081_hal_bf_set(device, rx_set_state1_addr, 0x0103,

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kernel_smatch: uninitialized symbol 'rx_set_state1_addr'.
0x1); /* rx_bg_cal_run = 1 */
AD9081_ERROR_RETURN(err);

Expand Down Expand Up @@ -860,7 +860,86 @@
return API_CMS_ERROR_OK;
}

int32_t adi_ad9081_jesd_rx_calibrate_204c_lane_status_get(adi_ad9081_device_t *device,
uint8_t physical_lane,
adi_ad9081_jrx_fg_cal_result_t *res)
{
int32_t err;
uint8_t reg8[3];
AD9081_NULL_POINTER_RETURN(device);
AD9081_INVALID_PARAM_RETURN(physical_lane > 7);

if (device->dev_info.dev_rev != 3) { /* r2 */
return API_CMS_ERROR_NOT_SUPPORTED;
}

err = adi_ad9081_hal_reg_get(device, 0x21e0 + (3 * physical_lane), &reg8[0]);
AD9081_ERROR_RETURN(err);
err = adi_ad9081_hal_reg_get(device, 0x21e1 + (3 * physical_lane), &reg8[1]);
AD9081_ERROR_RETURN(err);
err = adi_ad9081_hal_reg_get(device, 0x21e2 + (3 * physical_lane), &reg8[2]);
AD9081_ERROR_RETURN(err);

res->status = (reg8[0] & 0x7) == 0x7;
res->failed_mask = res->status ? 0 : (1 << physical_lane);
res->goodness = ((reg8[0] & 0xE0) << 3) | reg8[1];
res->spo_left = reg8[2] >> 4;
res->spo_right = reg8[2] & 0xF;

return API_CMS_ERROR_OK;
}

int32_t adi_ad9081_jesd_rx_calibrate_204c_status_get(adi_ad9081_device_t *device,
adi_ad9081_jrx_fg_cal_result_t *res)
{
int32_t err, lane;
uint16_t min_goodness = 0xFFFF;
uint8_t lanes, min_spo_left = 0xFF, min_spo_right = 0xFF;
adi_ad9081_jrx_fg_cal_result_t lane_res;
AD9081_NULL_POINTER_RETURN(device);
AD9081_LOG_FUNC();

err = adi_ad9081_hal_reg_get(device, REG_PHY_PD_ADDR, &lanes); /* not paged */
AD9081_ERROR_RETURN(err);

if (lanes == 0xFF) {
err = adi_ad9081_hal_log_write(device, ADI_CMS_LOG_ERR, "no active lanes");
AD9081_ERROR_RETURN(err);

return API_CMS_ERROR_ERROR;
}

res->status = 1;
res->failed_mask = 0;

for (lane = 0; lane < 8; lane++) {
if (lanes & (1u << lane))
continue;

err = adi_ad9081_jesd_rx_calibrate_204c_lane_status_get(device, lane, &lane_res);
AD9081_ERROR_RETURN(err);

if (!lane_res.status) {
res->status = 0;
res->failed_mask |= (1u << lane);
err = adi_ad9081_hal_log_write(device, ADI_CMS_LOG_ERR, "lane %u fg cal failed", lane);
AD9081_ERROR_RETURN(err);
continue;
}

min_goodness = MIN(min_goodness, lane_res.goodness);
min_spo_left = MIN(min_spo_left, lane_res.spo_left);
min_spo_right = MIN(min_spo_right, lane_res.spo_right);
}

res->goodness = min_goodness;
res->spo_left = min_spo_left;
res->spo_right = min_spo_right;

return API_CMS_ERROR_OK;
}

int32_t adi_ad9081_jesd_rx_load_cbus_table(adi_ad9081_device_t *device,

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gcc_fanalayzer: no previous prototype for 'adi_ad9081_jesd_rx_load_cbus_table' [-Wmissing-prototypes]
942 | int32_t adi_ad9081_jesd_rx_load_cbus_table(adi_ad9081_device_t *device,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

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kernel_sparse: no previous prototype for 'adi_ad9081_jesd_rx_load_cbus_table' [-Wmissing-prototypes]
 942 | int32_t adi_ad9081_jesd_rx_load_cbus_table(adi_ad9081_device_t *device,
 | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
adi_ad9081_deser_mode_e deser_mode)
{
int32_t err;
Expand Down Expand Up @@ -922,7 +1001,7 @@
return API_CMS_ERROR_OK;
}

int32_t adi_ad9081_jesd_rx_ctle_filter_set(adi_ad9081_device_t *device,

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gcc_fanalayzer: no previous prototype for 'adi_ad9081_jesd_rx_ctle_filter_set' [-Wmissing-prototypes]
1004 | int32_t adi_ad9081_jesd_rx_ctle_filter_set(adi_ad9081_device_t *device,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

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kernel_sparse: no previous prototype for 'adi_ad9081_jesd_rx_ctle_filter_set' [-Wmissing-prototypes]
 1004 | int32_t adi_ad9081_jesd_rx_ctle_filter_set(adi_ad9081_device_t *device,
 | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
uint8_t lanes, uint8_t ctle_filter)
{
int32_t err;
Expand Down Expand Up @@ -1039,7 +1118,7 @@
return API_CMS_ERROR_OK;
}

int32_t adi_ad9081_jesd_rx_bit_rate_get(adi_ad9081_device_t *device,

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gcc_fanalayzer: no previous prototype for 'adi_ad9081_jesd_rx_bit_rate_get' [-Wmissing-prototypes]
1121 | int32_t adi_ad9081_jesd_rx_bit_rate_get(adi_ad9081_device_t *device,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

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kernel_sparse: no previous prototype for 'adi_ad9081_jesd_rx_bit_rate_get' [-Wmissing-prototypes]
 1121 | int32_t adi_ad9081_jesd_rx_bit_rate_get(adi_ad9081_device_t *device,
 | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
uint64_t *bit_rate_bps)
{
int32_t err;
Expand Down Expand Up @@ -1097,7 +1176,7 @@
return API_CMS_ERROR_OK;
}

int32_t adi_ad9081_jesd_pll_load_cbus_table(adi_ad9081_device_t *device)

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gcc_fanalayzer: no previous prototype for 'adi_ad9081_jesd_pll_load_cbus_table' [-Wmissing-prototypes]
1179 | int32_t adi_ad9081_jesd_pll_load_cbus_table(adi_ad9081_device_t *device)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
{
int32_t err;
uint8_t i;
Expand Down Expand Up @@ -1129,7 +1208,7 @@
return API_CMS_ERROR_OK;
}

int32_t adi_ad9081_jesd_pll_default_changes(adi_ad9081_device_t *device)

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gcc_fanalayzer: no previous prototype for 'adi_ad9081_jesd_pll_default_changes' [-Wmissing-prototypes]
1211 | int32_t adi_ad9081_jesd_pll_default_changes(adi_ad9081_device_t *device)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
{
int32_t err;
AD9081_NULL_POINTER_RETURN(device);
Expand All @@ -1149,7 +1228,7 @@
return API_CMS_ERROR_OK;
}

int32_t adi_ad9081_jesd_rx_pll_startup(adi_ad9081_device_t *device,

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gcc_fanalayzer: no previous prototype for 'adi_ad9081_jesd_rx_pll_startup' [-Wmissing-prototypes]
1231 | int32_t adi_ad9081_jesd_rx_pll_startup(adi_ad9081_device_t *device,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
uint64_t bit_rate, uint8_t jesd204b_en)
{
int32_t err;
Expand Down Expand Up @@ -4835,7 +4914,7 @@
dformat_out_mask = dformat_out_mask0 | dformat_out_mask1;

/* find the highest common unused DFormat output for both links */
for (i = 15; i >= 0; i--) {

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kernel_smatch: always true condition '(i >= 0) => (0-255 >= 0)'

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kernel_smatch: always true condition '(i >= 0) => (0-255 >= 0)'
if ((dformat_out_mask & (1 << i)) == 0) {
nc = (uint8_t)i;
break;
Expand Down
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