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Edge ML Inference Pipeline (DSP-Style Simulation)

Overview

This project demonstrates a lightweight edge ML inference pipeline focused on measuring latency and memory usage, simulating DSP-style constraints commonly found in automotive and embedded systems.

Model

  • YOLOv5 Nano (Ultralytics)
  • FP16 precision

What This Project Shows

  • End-to-end inference execution
  • Latency measurement
  • Memory footprint analysis
  • Edge-oriented optimization mindset

Results (CPU Execution)

  • Latency: ~2000 ms (CPU + framework overhead)
  • Memory: ~14 MB

Note: Absolute latency on CPU is not the focus. The goal is understanding bottlenecks and how DSP/accelerator-based execution would improve performance and power efficiency.

How to Run

python scripts/run_inference.py

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