os/board/bk7239n: Adapt to the new flash id#7276
os/board/bk7239n: Adapt to the new flash id#7276Poly-J wants to merge 1 commit intoSamsung:masterfrom
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can you please let me know which flash you added?
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| #if CONFIG_FLASH_QUAD_ENABLE | ||
| {0x684018, 2, FLASH_SIZE_16M, FLASH_LINE_MODE_FOUR, 14, 2, 0x1F, 0x1F, 0x00, 0x0E, 0x00E, 9, 1, 0xA0, 0x02}, //BY25Q128ES | ||
| #else | ||
| {0x684018, 1, FLASH_SIZE_16M, FLASH_LINE_MODE_TWO, 0, 2, 0x1F, 0x1F, 0x00, 0x0E, 0x00E, 0, 0, 0xA0, 0x01}, //BY25Q128ES |
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please add some description related to 'BY25Q128ES'
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Hi, Kwon. The BY25Q128 is manufactured by BYT Semiconductor.The BY25Q128ES is 128M-bit Serial Peripheral Interface (SPI) Flash memory, and supports the Dual/Quad SPI: Serial Clock, Chip Select, Serial Data I/O0 (SI), I/O1 (SO), I/O2 (/WP), and I/O3(/HOLD). The Dual I/O data is transferred with speed of 216Mbits/s and the Quad I/O & Quad output data is transferred with speed of 432Mbits/s. The device uses a single low voltage power supply, ranging from 2.7 Volt to 3.6 Volt.
| {0xCD6017, 1, FLASH_SIZE_8M, FLASH_LINE_MODE_TWO, 0, 2, 0x1F, 0x1F, 0x00, 0x0E, 0x00E, 0, 0, 0xA0, 0x01}, //th_25q64ha | ||
| #endif | ||
| #if defined(CONFIG_FLASH_QUAD_ENABLE) | ||
| {0xC86518, 2, FLASH_SIZE_16M, FLASH_LINE_MODE_FOUR, 14, 2, 0x1F, 0x1F, 0x00, 0x0E, 0x00E, 9, 1, 0xA0, 0x02}, //gd_25w128e |
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hmmm it's not GD25Q128E?? as I know value is 0xc84018 can you please double check this?
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My apologies, I should double-check the ID in case a mistake was made. It’s possible that it refers to a different series within the GD line.
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Hi,Kwon. I double-checked the manual against the code. It turns out there are two GD models: GD25WQ128E (0xC86518) and GD25Q128E (0xC84018). I’ll update the IDs in the code soon to make sure the mapping is accurate.
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The XT25F128W is already supported in the previous codebase. Below are the new Flash ID models for which we are now providing support: BY25Q128ES |
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Hi @Taejun-Kwon , I have updated and submitted the entries for both GD25WQ128E (ID: 0xC86518) and GD25Q128E (ID: 0xC84018) as requested. Please let me know if you have any questions. |
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Dear SS Colleagues, Please refer to the following BY flash booting log, thx. [FORCE] main 0x200428d [FORCE] Starting bootloader efuse=8000000 [FORCE] do_boot_without_signing start boot_param: line[359], CONFIG_NUM_APPS : 2 [FORCE] normal slot :0x0 boot_param: slot=0 stored_crc=0x085faaf0 computed_crc=0x085faaf0 (full partition, size=0x001614b4) attempt 1 [FORCE] do_boot_without_signing end vt: 0x2081000 [TFM] config ppc and NSPE is coming [init]regs - 0, 0, 0 [init]bandgap_calm_in_otp=0x1a [init]trng enable up_flashinitialize OK! binary_manager_register_kpart: [KERNEL 0] part num 4 size 1662976, address 0x80000 binary_manager_register_upart: [USER0 : 1] common size 1048576 num 5, address 0x216000 binary_manager_register_upart: [USER1 : 1] app1 size 393216 num 6, address 0x316000 binary_manager_register_upart: [USER2 : 1] app2 size 131072 num 7, address 0x376000 binary_manager_register_kpart: [KERNEL 1] part num 8 size 1662976, address 0x396000 binary_manager_register_upart: [USER0 : 2] common size 1048576 num 9, address 0x52c000 binary_manager_register_upart: [USER1 : 2] app1 size 393216 num 10, address 0x62c000 binary_manager_register_upart: [USER2 : 2] app2 size 131072 num 11, address 0x68c000 /dev/smart0p12 is mounted successfully @ /mnt [i2c]I2C(0) init ok, baud_rate:0 i2c_uioregister: Registering /dev/i2c-0 [hal]spi select src_clk xtal [cal]calibration_main(unknown-48Pin) over [cal]tx_i_dc_2G: 0x7fc,tx_q_dc_2G: 0x805 [cal]tx_q_dc_5G: 0x86c,tx_q_dc_5G: 0x800 [cal]temp in otp is:8568 se_register: Registering /dev/seclink armino_hal_init: [ARMINO_HAL_WRAPPER]armino/security_armino_wrapper_tz.c:102 binary_manager_scan_bootparam: Checking BP0 start binary_manager_load: app1 Header Checking Success |
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Let me try powercut test for 1h for each of device. |
The bk7239n module needs to be compatible with multiple types of flash, and the software needs to adapt to the new flash ID.
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==== XMC_0x204018_boot_log ==== [FORCE] main 0x200428d [FORCE] Starting bootloader efuse=8000000 [FORCE] do_boot_without_signing start boot_param: line[359], CONFIG_NUM_APPS : 2 [FORCE] normal slot :0x0 boot_param: slot=0 stored_crc=0xc54abcb8 computed_crc=0xc54abcb8 (full partition, size=0x0016257c) attempt 1 [FORCE] do_boot_without_signing end vt: 0x20a1000 [TFM] config ppc and NSPE is coming [init]regs - 0, 0, 0 [init]bandgap_calm_in_otp=0x1e [init]trng enable up_flashinitialize OK! binary_manager_register_kpart: [KERNEL 0] part num 4 size 1888256, address 0xa0000 /dev/smart0p10 is mounted successfully @ /mnt i2c_uioregister: Registering /dev/i2c-0 [cal]calibration_main(unknown-48Pin) over [cal]tx_q_dc_5G: 0x811,tx_q_dc_5G: 0x810 [cal]temp in otp is:8508 se_register: Registering /dev/seclink binary_manager_load: app1 Header Checking Success System Information: Binary manager notify binary started |
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=== GD_0xc84018 log === [FORCE] main 0x200428d [FORCE] Starting bootloader efuse=8000000 [FORCE] do_boot_without_signing start boot_param: line[359], CONFIG_NUM_APPS : 2 [FORCE] normal slot :0x0 boot_param: slot=0 stored_crc=0xa8fa7db5 computed_crc=0xa8fa7db5 (full partition, size=0x00160a14) attempt 1 [FORCE] do_boot_without_signing end vt: 0x20a1000 [TFM] config ppc and NSPE is coming [init]regs - 0, 0, 0 [init]bandgap_calm_in_otp=0x1a [init]trng enable up_flashinitialize OK! binary_manager_register_kpart: [KERNEL 0] part num 4 size 1662976, address 0xa0000 binary_manager_register_upart: [USER0 : 1] common size 1048576 num 5, address 0x236000 binary_manager_register_upart: [USER1 : 1] app1 size 393216 num 6, address 0x336000 binary_manager_register_upart: [USER2 : 1] app2 size 131072 num 7, address 0x396000 binary_manager_register_kpart: [KERNEL 1] part num 8 size 1662976, address 0x3b6000 binary_manager_register_upart: [USER0 : 2] common size 1048576 num 9, address 0x54c000 binary_manager_register_upart: [USER1 : 2] app1 size 393216 num 10, address 0x64c000 binary_manager_register_upart: [USER2 : 2] app2 size 131072 num 11, address 0x6ac000 /dev/smart0p12 is mounted successfully @ /mnt [i2c]I2C(0) init ok, baud_rate:0 i2c_uioregister: Registering /dev/i2c-0 [hal]spi select src_clk xtal [cal]calibration_main(unknown-48Pin) over [cal]tx_i_dc_2G: 0x83a,tx_q_dc_2G: 0x849 [cal]tx_q_dc_5G: 0x843,tx_q_dc_5G: 0x816 [cal]temp in otp is:8679 se_register: Registering /dev/seclink armino_hal_init: [ARMINO_HAL_WRAPPER]armino/security_armino_wrapper_tz.c:102 binary_manager_scan_bootparam: Checking BP0 start binary_manager_load: app1 Header Checking Success TASH>> |
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=====XTX_0xb4018===== [FORCE] main 0x200428d [FORCE] Starting bootloader efuse=8000000 [FORCE] do_boot_without_signing start boot_param: line[359], CONFIG_NUM_APPS : 2 [FORCE] normal slot :0x0 boot_param: slot=0 stored_crc=0xa8fa7db5 computed_crc=0xa8fa7db5 (full partition, size=0x00160a14) attempt 1 [FORCE] do_boot_without_signing end vt: 0x20a1000 [TFM] config ppc and NSPE is coming [init]regs - 0, 0, 0 [init]bandgap_calm_in_otp=0x16 [init]trng enable up_flashinitialize OK! binary_manager_register_kpart: [KERNEL 0] part num 4 size 1662976, address 0xa0000 binary_manager_register_upart: [USER0 : 1] common size 1048576 num 5, address 0x236000 binary_manager_register_upart: [USER1 : 1] app1 size 393216 num 6, address 0x336000 binary_manager_register_upart: [USER2 : 1] app2 size 131072 num 7, address 0x396000 binary_manager_register_kpart: [KERNEL 1] part num 8 size 1662976, address 0x3b6000 binary_manager_register_upart: [USER0 : 2] common size 1048576 num 9, address 0x54c000 binary_manager_register_upart: [USER1 : 2] app1 size 393216 num 10, address 0x64c000 binary_manager_register_upart: [USER2 : 2] app2 size 131072 num 11, address 0x6ac000 /dev/smart0p12 is mounted successfully @ /mnt [i2c]I2C(0) init ok, baud_rate:0 i2c_uioregister: Registering /dev/i2c-0 [hal]spi select src_clk xtal [cal]calibration_main(unknown-48Pin) over [cal]tx_i_dc_2G: 0x7f1,tx_q_dc_2G: 0x82d [cal]tx_q_dc_5G: 0x852,tx_q_dc_5G: 0x820 [cal]temp in otp is:8399 se_register: Registering /dev/seclink armino_hal_init: [ARMINO_HAL_WRAPPER]armino/security_armino_wrapper_tz.c:102 binary_manager_scan_bootparam: Checking BP0 start binary_manager_load: app1 Header Checking Success |
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====Winb_0xef4018==== FORCE] main 0x200428d [FORCE] Starting bootloader efuse=8000000 [FORCE] do_boot_without_signing start boot_param: line[359], CONFIG_NUM_APPS : 2 [FORCE] normal slot :0x0 boot_param: slot=0 stored_crc=0xa8fa7db5 computed_crc=0xa8fa7db5 (full partition, size=0x00160a14) attempt 1 [FORCE] do_boot_without_signing end vt: 0x20a1000 [TFM] config ppc and NSPE is coming [init]regs - 0, 0, 0 [init]bandgap_calm_in_otp=0x16 [init]trng enable up_flashinitialize OK! binary_manager_register_kpart: [KERNEL 0] part num 4 size 1662976, address 0xa0000 binary_manager_register_upart: [USER0 : 1] common size 1048576 num 5, address 0x236000 binary_manager_register_upart: [USER1 : 1] app1 size 393216 num 6, address 0x336000 binary_manager_register_upart: [USER2 : 1] app2 size 131072 num 7, address 0x396000 binary_manager_register_kpart: [KERNEL 1] part num 8 size 1662976, address 0x3b6000 binary_manager_register_upart: [USER0 : 2] common size 1048576 num 9, address 0x54c000 binary_manager_register_upart: [USER1 : 2] app1 size 393216 num 10, address 0x64c000 binary_manager_register_upart: [USER2 : 2] app2 size 131072 num 11, address 0x6ac000 /dev/smart0p12 is mounted successfully @ /mnt [i2c]I2C(0) init ok, baud_rate:0 i2c_uioregister: Registering /dev/i2c-0 [hal]spi select src_clk xtal [cal]calibration_main(unknown-48Pin) over [cal]tx_i_dc_2G: 0x83d,tx_q_dc_2G: 0x7fc [cal]tx_q_dc_5G: 0x834,tx_q_dc_5G: 0x808 [cal]temp in otp is:8390 se_register: Registering /dev/seclink armino_hal_init: [ARMINO_HAL_WRAPPER]armino/security_armino_wrapper_tz.c:102 binary_manager_scan_bootparam: Checking BP0 start binary_manager_load: app1 Header Checking Success |
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Hello, I have verified the 5 different flash types board (the flash id are XTX_0xb4018, Winb_0xef4018, BY_0x684018, GD_0xc84018 and XMC_0x204018) with PR7286 and PR7276. |
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The bk7239n module needs to be compatible with multiple types of flash, and the software needs to adapt to the new flash ID.