Strahinja.jacimovic/improvement defs - #579
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IvanRuzavin
approved these changes
May 11, 2026
esmaniksic
approved these changes
May 11, 2026
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Fixed discrepancies found during testing.
GENCTRL- 1,2,3,4,5,6,7,8 andTEMPLATERCC_CRRCRThis register applies to STM32G0B1xx and STM32G0C1xx only. It is reserved otherwise.0x4...to0x5...