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It tests the generation of QFPs, not QFNs.
Largely copied from generate_qfp.py The relevant standard is JEDEC MO-220. Each variation is put into a config class object and realised similarly to the QFPs. The main difference is that getting the pin positions is now a function of the config class and it can handle non-square packages. The maximum dimensions for pad sizes from JEDEC MO-220 are what's used. Sometimes this doesn't leave 200µm between pads in which case, the length of the edge pads and the width and height of the centre pad is reduced equally until there's space. *** Sometimes librepcb still complains about there being >200µm between corner pads, e.g VEEE, VHHE-1, VFFD-1, VHHD-2. I think, this is a false positive; if you get the ruler tool and measure the distance between corners, it's fine. You do only get errors in footprints have had to be tweaked though so, I don't know. *** The silkscreen is little right angles on each corner, positioned just outside the package outline, minus that line that would go down to pin 1. Configs have a function for getting how far along the side their pins go for this purpose. If there's not enough space to draw a line at least `line_width' down the side, the silkscreen is pushed out a bit further. Naming! Packages are named with their IPC name plus their JEDEC MO-220 variation name, e.g VQFN50P900X900X100-64-VMMD-3. This is because, some variations have the same pitch, dimensions and pin number and would overwrite each other if we just used IPC naming.
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I've written a generator for QFN packages, largely by copying and changing the on for QFPs.
Reasons why this is a draft: