insert_reachable_cti: on arm32, use the lower order bit in the given …#2457
insert_reachable_cti: on arm32, use the lower order bit in the given …#2457aleden wants to merge 3 commits intoDynamoRIO:masterfrom
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…address instead of assuming that the target is the same as the current ISA mode. clean calls to ARM code, for example, should be allowed.
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Please see https://github.com/DynamoRIO/dynamorio/wiki/Code-Reviews#commit-messages (the commit message should have a separate title from its body and should capitalize complete sentences in the body). |
| ASSERT(scratch != REG_NULL); /* required */ | ||
| /* load target into scratch register */ | ||
| insert_mov_immed_ptrsz(dcontext, (ptr_int_t) | ||
| PC_AS_JMP_TGT(dr_get_isa_mode(dcontext), target), |
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What I'm puzzling over is the reason that 850c10c put this here: it is called out in the commit message so there must have been something that did not have the lsb set. Not everything does: e.g., fragment tags deliberately do not have lsb set. There must have been something like that that would make its way here. Does a test suite run on arm hit any discrepancy here?
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I think for clean calls, we can rely on the ARM/Thumb bit being set properly in the address of the function. But I am not sure if that is true for the code DynamoRIO emits itself? Then we would need to set it explicitly when moving the address to a register.
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run aarch32 tests |
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run aarch32 tests |
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…address instead of assuming that the target is the same as the current ISA mode. clean calls to ARM code, for example, should be allowed.