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1. cocotb-ghdl-ci-cd-template cocotb-ghdl-ci-cd-template Public template

   This repository provides a lightweight, scalable automated verification pipeline for VHDL-based designs. It integrates GHDL (simulation) and Cocotb (Python-based verification) into GitHub Actions, …

   Python

2. osvvm-modelsim-ci-cd-template osvvm-modelsim-ci-cd-template Public template

   A GitHub template repository for quickly creating VHDL/FPGA projects with a standardized structure and preconfigured CI/CD workflows, including OSVVM support.

   VHDL 5

3. axi-dma-cora-z7-07s axi-dma-cora-z7-07s Public

   A practical implementation of AXI DMA on Zynq-7000 (Cora Z7) using High-Performance (HP) Slave port. Includes a guide on polling mode configuration, interrupt mode configuration, and scatter-gather…

4. python-fpga-hil-setup python-fpga-hil-setup Public

5. vhdl-fir-filter-ip vhdl-fir-filter-ip Public

   A complete FIR filter design suite: VHDL hardware implementation + Streamlit web dashboard for coefficient quantization and frequency response analysis.

   Tcl

6. vhdl-pid-controller-ip vhdl-pid-controller-ip Public