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@abrender would you mind testing it again? |
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Hello, I tried your PR on my M4 MacbookAir but I'm hitting the exception you introduced when trying to use the chainload. According to your initial comment on the PR, it seems you have a similar state (wrong value + locked), making me think you should also raise this exception when trying to chainload. Note: Not changing the secondary CPUs RVBARs allows me to complete the "chainload" (e.g. loading a patched m1n1), thus I'm wondering if this script should do it at all? |
Signed-off-by: Yureka <yureka@cyberchaos.dev>
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I tested the following on my M4 Mac Mini:
IMO this PR is ready to be merged, as it solves the problem of causing the SError in smp init (for example when chainloading). |
Signed-off-by: Yureka <yureka@cyberchaos.dev>
Signed-off-by: Yureka <yureka@cyberchaos.dev>
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Tested on my M4 Macbook Air, chainloading works properly and I don't hit the Python Exception anymore. |
Sorry for the delayed response - I no longer have access to the M4 to test :( |
According to the discussion here, the RVBAR at cpu_impl_reg+0x00 is already set to the m1n1 entrypoint and locked by iBoot for all cores on M4.
Indeed, I can see the following values:
m1n1 base:
0x100034f4000E-Cores cpu_impl_reg at
0x210X50000:0x100100034f4001P-Cores cpu_impl_reg at
0x211X50000:0x1100100034f4001And voila, when skipping the writes when the value is already correct (which previously produced SErrors when writing to the P-Core cpu_impl_reg),
smp_start_secondaries()now works as expected.