perf lab: resolve IL2CPP cost with WPR, PMU, and native maps

[wallstop]

Part of #500. Depends on #506, #507, #508, and #510.

Question

Which resolved native operations account for material cost in each target workload, and do samples, hardware counters, generated code, and sensitivity controls support the proposed mechanism?

Mechanism

Managed source shape and inclusive time do not identify a native bottleneck. IL2CPP generic sharing, RGCTX calls, class initialization, inlining, code layout, branches, and memory access must be resolved from generated C++ through PDB symbols to assembly and sampled execution.

Contract

Collect attribution separately from the uninstrumented verdict. Mark outer workload intervals, never each emit. Measure profiler observer effects. Do not treat samples or PMU events as independent performance replicates, infer cache/branch causes without matching counters, or call injected delay a maximum possible speedup.

Map managed method to generated C++ to PDB/native symbol to disassembly for every claimed cost center.

Factors and workloads

• Raw delegate, C# event, MessagePipe, empty bus, direct handler, token handler, and full bus tax ladder.
• GlobalToOne, StructNoBox, Filtered, PostProcess, FilteredPostProcess, GlobalToMany, and KeyedToOne.
• Fan-out 1/16/64/256 and canonical payloads.
• WPR sampled CPU, available PMU counters, Top-Down categories, symbol size, calls, branches, stack, and instruction count.
• Known CPU, branch-sensitive, and memory-stride controls.
• WPR on/off observer-effect controls and replicated uninstrumented verdict runs.

Primary response

The resolved native cost-center share and interval within the exact player-thread target interval.

Independent unit

One complete trace from a fresh player produced by an independently hashed clean build. Samples and events inside it are nested observations.

Effect threshold

Proceed only when replicated resolved attribution, including worst-case assignment of all unresolved samples, lies wholly above 3% of the target interval, and dose-response sensitivity moves the intended target without moving sentinels. Target total unresolved share of 1% or less. Native/PMU evidence never replaces the later throughput gate.

RED proof

• Resolve a known non-inlined control end to end.
• Vary its duty level and prove sample share moves monotonically.
• Run branch and memory controls and prove their counters move as expected.
• Remove or mismatch the PDB and prove mapping fails closed.
• Inject candidate-site delays at multiple doses and prove target sensitivity without sentinel movement.
• Compare WPR-on and WPR-off players to quantify observer effects.

GREEN suites

Pass symbol-map fixtures, ambiguous/missing-symbol cases, native-size accounting, interval validation, WPR/PMU controls, replicated captures, and replay from retained ETL. Runtime code and allocation suites remain unchanged by this attribution task.

Stop rule

Do not open an implementation PR when symbols are unresolved, total unknown attribution can flip the decision, controls fail, a required PMU source is unavailable, the cost interval is at or below 3%, or sensitivity is absent. Record the negative or blocked result.

Immutable evidence

Publish trace/ETL bundles through #508, including PDB/player hashes, generated C++, maps, disassembly, call trees, PMU tables, interval boundaries, controls, environment, observer-effect result, and decision.

Dependencies

Findings gate mechanism-specific work in #501 through #504. Exact twins from #507 select fair workloads; #510 supplies replication and intervals.

Completion checklist

• Add managed-to-native mapping.
• Validate exact interval boundaries.
• Pass symbol, duty-level, branch, memory, and observer controls.
• Capture the semantic tax ladder and primary targets.
• Bound total unresolved attribution.
• Export samples, PMU data, sizes, and disassembly.
• Identify only interval-supported actionable cost centers.
• Link every accepted or rejected hypothesis to immutable evidence.