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protz merged 1 commit into from
Apr 27, 2026
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p4 example trying to preserve sharing using simp #75

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26 changes: 26 additions & 0 deletions Kraken/Examples.lean
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Original file line number Diff line number Diff line change
Expand Up @@ -206,3 +206,29 @@ theorem p3_correct [Layout] (initial: MachineState):
apply Nat.pow_le_pow_right (by decide)
omega
-/

def p4 := eval% parse! "start: mov $2, %rax
dec %rax"

-- Super-simple example to debug tactics
example [layout : Layout] s : step1 (layout p4) (s, layout.start) (fun s => s.1.regs.rax = 1) := by
let ss := s
change (step1 _ (ss, _) _)
cases s with | mk regs flags mem =>
cases regs with | mk rax =>
delta p4
dsimp only [step1,Executable.straightline]
rw [Executable.directivesFromStart]
simp [List.mapIdx,List.mapIdx.go]
dsimp (zeta:=false) only [Directives.interp,Directive.interp,Instr.interp,Operation.interp,Operand.interp,ConstExpr.interp,RegOrMem.interp,Reg.interp,Reg64s.get,Reg.base,Reg.offset,MachineData.set,MachineData.setReg,Reg64s.set,Width.type,Width.bits]
dsimp (zeta:=false)(beta:=true)(eta:=false)(iota:=true)(proj:=true) only [Reg64s.get64,Reg64s.set64,BitVec.drop,BitVec.take,ss] -- reduces UInt64.toBitVec but leaves let binders behind and gets stuck confused on it
intros rax1
lift_lets; intros t -- unfortunately a separte tactic rather than a simp flag
-- simp [MachineData.regs,Reg64s.set64,Reg64s.get64,ss] at t -- made no progress for some reason
dsimp (zeta:=false)(beta:=false)(eta:=false)(iota:=false)(proj:=true) only [Reg64s.set64,Reg64s.get64,ss,t]
-- now just bashing because rax1 in context is already bad
simp [rax1]
simp (ground:=true)
simp
simp (decide:=true)

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