Skip to content

Commit 5d2b9fa

Browse files
author
Umer Saleem
committed
Merge tag 'v6.12.15' into test-6.12.15
This is the 6.12.15 stable release Signed-off-by: Umer Saleem <usaleem@ixsystems.com>
2 parents cce2e7b + 984391d commit 5d2b9fa

File tree

1,381 files changed

+14658
-7572
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

1,381 files changed

+14658
-7572
lines changed

Documentation/admin-guide/cgroup-v2.rst

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2954,7 +2954,7 @@ following two functions.
29542954
a queue (device) has been associated with the bio and
29552955
before submission.
29562956

2957-
wbc_account_cgroup_owner(@wbc, @page, @bytes)
2957+
wbc_account_cgroup_owner(@wbc, @folio, @bytes)
29582958
Should be called for each data segment being written out.
29592959
While this function doesn't care exactly when it's called
29602960
during the writeback session, it's the easiest and most

Documentation/arch/arm64/elf_hwcaps.rst

Lines changed: 26 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -174,22 +174,28 @@ HWCAP2_DCPODP
174174
Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010.
175175

176176
HWCAP2_SVE2
177-
Functionality implied by ID_AA64ZFR0_EL1.SVEver == 0b0001.
177+
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
178+
ID_AA64ZFR0_EL1.SVEver == 0b0001.
178179

179180
HWCAP2_SVEAES
180-
Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001.
181+
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
182+
ID_AA64ZFR0_EL1.AES == 0b0001.
181183

182184
HWCAP2_SVEPMULL
183-
Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0010.
185+
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
186+
ID_AA64ZFR0_EL1.AES == 0b0010.
184187

185188
HWCAP2_SVEBITPERM
186-
Functionality implied by ID_AA64ZFR0_EL1.BitPerm == 0b0001.
189+
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
190+
ID_AA64ZFR0_EL1.BitPerm == 0b0001.
187191

188192
HWCAP2_SVESHA3
189-
Functionality implied by ID_AA64ZFR0_EL1.SHA3 == 0b0001.
193+
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
194+
ID_AA64ZFR0_EL1.SHA3 == 0b0001.
190195

191196
HWCAP2_SVESM4
192-
Functionality implied by ID_AA64ZFR0_EL1.SM4 == 0b0001.
197+
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
198+
ID_AA64ZFR0_EL1.SM4 == 0b0001.
193199

194200
HWCAP2_FLAGM2
195201
Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010.
@@ -198,16 +204,20 @@ HWCAP2_FRINT
198204
Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001.
199205

200206
HWCAP2_SVEI8MM
201-
Functionality implied by ID_AA64ZFR0_EL1.I8MM == 0b0001.
207+
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
208+
ID_AA64ZFR0_EL1.I8MM == 0b0001.
202209

203210
HWCAP2_SVEF32MM
204-
Functionality implied by ID_AA64ZFR0_EL1.F32MM == 0b0001.
211+
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
212+
ID_AA64ZFR0_EL1.F32MM == 0b0001.
205213

206214
HWCAP2_SVEF64MM
207-
Functionality implied by ID_AA64ZFR0_EL1.F64MM == 0b0001.
215+
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
216+
ID_AA64ZFR0_EL1.F64MM == 0b0001.
208217

209218
HWCAP2_SVEBF16
210-
Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0001.
219+
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
220+
ID_AA64ZFR0_EL1.BF16 == 0b0001.
211221

212222
HWCAP2_I8MM
213223
Functionality implied by ID_AA64ISAR1_EL1.I8MM == 0b0001.
@@ -273,7 +283,8 @@ HWCAP2_EBF16
273283
Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0010.
274284

275285
HWCAP2_SVE_EBF16
276-
Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0010.
286+
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
287+
ID_AA64ZFR0_EL1.BF16 == 0b0010.
277288

278289
HWCAP2_CSSC
279290
Functionality implied by ID_AA64ISAR2_EL1.CSSC == 0b0001.
@@ -282,7 +293,8 @@ HWCAP2_RPRFM
282293
Functionality implied by ID_AA64ISAR2_EL1.RPRFM == 0b0001.
283294

284295
HWCAP2_SVE2P1
285-
Functionality implied by ID_AA64ZFR0_EL1.SVEver == 0b0010.
296+
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
297+
ID_AA64ZFR0_EL1.SVEver == 0b0010.
286298

287299
HWCAP2_SME2
288300
Functionality implied by ID_AA64SMFR0_EL1.SMEver == 0b0001.
@@ -309,7 +321,8 @@ HWCAP2_HBC
309321
Functionality implied by ID_AA64ISAR2_EL1.BC == 0b0001.
310322

311323
HWCAP2_SVE_B16B16
312-
Functionality implied by ID_AA64ZFR0_EL1.B16B16 == 0b0001.
324+
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
325+
ID_AA64ZFR0_EL1.B16B16 == 0b0001.
313326

314327
HWCAP2_LRCPC3
315328
Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0011.

Documentation/core-api/symbol-namespaces.rst

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -68,7 +68,7 @@ is to define the default namespace in the ``Makefile`` of the subsystem. E.g. to
6868
export all symbols defined in usb-common into the namespace USB_COMMON, add a
6969
line like this to drivers/usb/common/Makefile::
7070

71-
ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE=USB_COMMON
71+
ccflags-y += -DDEFAULT_SYMBOL_NAMESPACE='"USB_COMMON"'
7272

7373
That will affect all EXPORT_SYMBOL() and EXPORT_SYMBOL_GPL() statements. A
7474
symbol exported with EXPORT_SYMBOL_NS() while this definition is present, will
@@ -79,7 +79,7 @@ A second option to define the default namespace is directly in the compilation
7979
unit as preprocessor statement. The above example would then read::
8080

8181
#undef DEFAULT_SYMBOL_NAMESPACE
82-
#define DEFAULT_SYMBOL_NAMESPACE USB_COMMON
82+
#define DEFAULT_SYMBOL_NAMESPACE "USB_COMMON"
8383

8484
within the corresponding compilation unit before any EXPORT_SYMBOL macro is
8585
used.

Documentation/devicetree/bindings/clock/imx93-clock.yaml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@ description: |
1616
properties:
1717
compatible:
1818
enum:
19+
- fsl,imx91-ccm
1920
- fsl,imx93-ccm
2021

2122
reg:

Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@ properties:
2727
description: |
2828
For multicolor LED support this property should be defined as either
2929
LED_COLOR_ID_RGB or LED_COLOR_ID_MULTI which can be found in
30-
include/linux/leds/common.h.
30+
include/dt-bindings/leds/common.h.
3131
enum: [ 8, 9 ]
3232

3333
required:

Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -50,15 +50,15 @@ properties:
5050
minimum: 0
5151
maximum: 1
5252

53-
rohm,charger-sense-resistor-ohms:
54-
minimum: 10000000
55-
maximum: 50000000
53+
rohm,charger-sense-resistor-micro-ohms:
54+
minimum: 10000
55+
maximum: 50000
5656
description: |
57-
BD71827 and BD71828 have SAR ADC for measuring charging currents.
58-
External sense resistor (RSENSE in data sheet) should be used. If
59-
something other but 30MOhm resistor is used the resistance value
60-
should be given here in Ohms.
61-
default: 30000000
57+
BD71815 has SAR ADC for measuring charging currents. External sense
58+
resistor (RSENSE in data sheet) should be used. If something other
59+
but a 30 mOhm resistor is used the resistance value should be given
60+
here in micro Ohms.
61+
default: 30000
6262

6363
regulators:
6464
$ref: /schemas/regulator/rohm,bd71815-regulator.yaml
@@ -67,7 +67,7 @@ properties:
6767

6868
gpio-reserved-ranges:
6969
description: |
70-
Usage of BD71828 GPIO pins can be changed via OTP. This property can be
70+
Usage of BD71815 GPIO pins can be changed via OTP. This property can be
7171
used to mark the pins which should not be configured for GPIO. Please see
7272
the ../gpio/gpio.txt for more information.
7373
@@ -113,7 +113,7 @@ examples:
113113
gpio-controller;
114114
#gpio-cells = <2>;
115115
116-
rohm,charger-sense-resistor-ohms = <10000000>;
116+
rohm,charger-sense-resistor-micro-ohms = <10000>;
117117
118118
regulators {
119119
buck1: buck1 {

Documentation/devicetree/bindings/mmc/mmc-controller.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@ properties:
2525
"#address-cells":
2626
const: 1
2727
description: |
28-
The cell is the slot ID if a function subnode is used.
28+
The cell is the SDIO function number if a function subnode is used.
2929
3030
"#size-cells":
3131
const: 0

Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -35,10 +35,6 @@ properties:
3535
$ref: regulator.yaml#
3636
unevaluatedProperties: false
3737

38-
properties:
39-
regulator-compatible:
40-
pattern: "^vbuck[1-4]$"
41-
4238
additionalProperties: false
4339

4440
required:
@@ -56,15 +52,13 @@ examples:
5652
5753
regulators {
5854
vbuck1 {
59-
regulator-compatible = "vbuck1";
6055
regulator-min-microvolt = <300000>;
6156
regulator-max-microvolt = <1193750>;
6257
regulator-enable-ramp-delay = <256>;
6358
regulator-allowed-modes = <0 1 2>;
6459
};
6560
6661
vbuck3 {
67-
regulator-compatible = "vbuck3";
6862
regulator-min-microvolt = <300000>;
6963
regulator-max-microvolt = <1193750>;
7064
regulator-enable-ramp-delay = <256>;

Documentation/driver-api/crypto/iaa/iaa-crypto.rst

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -272,7 +272,7 @@ The available attributes are:
272272
echo async_irq > /sys/bus/dsa/drivers/crypto/sync_mode
273273

274274
Async mode without interrupts (caller must poll) can be enabled by
275-
writing 'async' to it::
275+
writing 'async' to it (please see Caveat)::
276276

277277
echo async > /sys/bus/dsa/drivers/crypto/sync_mode
278278

@@ -283,6 +283,13 @@ The available attributes are:
283283

284284
The default mode is 'sync'.
285285

286+
Caveat: since the only mechanism that iaa_crypto currently implements
287+
for async polling without interrupts is via the 'sync' mode as
288+
described earlier, writing 'async' to
289+
'/sys/bus/dsa/drivers/crypto/sync_mode' will internally enable the
290+
'sync' mode. This is to ensure correct iaa_crypto behavior until true
291+
async polling without interrupts is enabled in iaa_crypto.
292+
286293
.. _iaa_default_config:
287294

288295
IAA Default Configuration

Documentation/gpu/drm-kms-helpers.rst

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -230,6 +230,9 @@ Panel Helper Reference
230230
.. kernel-doc:: drivers/gpu/drm/drm_panel_orientation_quirks.c
231231
:export:
232232

233+
.. kernel-doc:: drivers/gpu/drm/drm_panel_backlight_quirks.c
234+
:export:
235+
233236
Panel Self Refresh Helper Reference
234237
===================================
235238

0 commit comments

Comments
 (0)