arm64: dts: qocm: add te pin for aps and aps2 panel

Author: sunflower2333

arch/arm64/boot/dts/qcom/sm8550-ayaneo-ps.dts

@@ -852,9 +852,9 @@
 		status = "okay";
 		compatible = "ayaneo,wt0600-2k";
 		reg = <0>;
-		pinctrl-names = "default", "suspend";
-		pinctrl-0 = <&sde_dsi_active>;
-		pinctrl-1 = <&sde_dsi_suspend>;
+		pinctrl-names = "default", "sleep";
+		pinctrl-0 = <&sde_dsi_active>, <&sde_te_active>;
+		pinctrl-1 = <&sde_dsi_suspend>, <&sde_te_suspend>;
 
 		avdd-supply = <&sgm3804>;
 
@@ -1196,6 +1196,20 @@
 		bias-pull-down;
 	};
 
+	sde_te_active: sde-te-active-state {
+		pins = "gpio86";
+		function = "mdp_vsync";
+		drive-strength = <2>;
+		bias-pull-down;
+	};
+
+	sde_te_suspend: sde-te-suspend-state {
+		pins = "gpio86";
+		function = "mdp_vsync";
+		drive-strength = <2>;
+		bias-pull-down;
+	};
+
 	ts_irq: ts-irq-state {
 		pins = "gpio25";
 		function = "gpio";

arch/arm64/boot/dts/qcom/sm8650-ayaneo-ps2.dts

@@ -895,8 +895,8 @@
 		compatible = "ayaneo,wt0630-2k";
 		reg = <0>;
 		pinctrl-names = "default", "sleep";
-		pinctrl-0 = <&disp0_reset_n_active>;
-		pinctrl-1 = <&disp0_reset_n_suspend>;
+		pinctrl-0 = <&disp0_reset_n_active>, <&mdp_vsync_active>;
+		pinctrl-1 = <&disp0_reset_n_suspend>, <&mdp_vsync_suspend>;
 		vddio-supply = <&vreg_l12b_1p8>;
 		vci-supply = <&vreg_l13b_3p0>;
 		vdd-supply = <&vreg_l11b_1p2>;