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overlays: mcp2515: Add support for spi3 and spi5
Extend the mcp2515 overlay to support the spi3 and spi5 buses available on newer Raspberry Pi hardware. This adds the required dormant fragments to disable the default spidev drivers, updates the __overrides__ routing logic, and updates the README accordingly. Signed-off-by: Kevin Beichler <k.beichler@gmx.com>
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‎arch/arm/boot/dts/overlays/README‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3393,9 +3393,9 @@ Params: s08-spi<n>-<m>-present 4-bit integer, bitmap indicating MCP23S08
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Name: mcp2515
3396-
Info: Configures the MCP2515 CAN controller on spi0/1/2
3397-
For devices on spi1 or spi2, the interfaces should be enabled
3398-
with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
3396+
Info: Configures the MCP2515 CAN controller on spi0/1/2/3/5
3397+
For devices on spi1, spi2, spi3 or spi5, the interfaces should be enabled
3398+
with one of the spi<n>-1/2/3cs overlays.
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Load: dtoverlay=mcp2515,<param>=<val>
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Params: spi<n>-<m> Configure device at spi<n>, cs<m>
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(boolean, required)

‎arch/arm/boot/dts/overlays/mcp2515-overlay.dts‎

Lines changed: 199 additions & 146 deletions
Original file line numberDiff line numberDiff line change
@@ -8,149 +8,202 @@
88
#include <dt-bindings/pinctrl/bcm2835.h>
99

1010
/ {
11-
compatible = "brcm,bcm2835";
12-
13-
fragment@0 {
14-
target = <&spidev0>;
15-
__dormant__ {
16-
status = "disabled";
17-
};
18-
};
19-
20-
fragment@1 {
21-
target = <&spidev1>;
22-
__dormant__ {
23-
status = "disabled";
24-
};
25-
};
26-
27-
fragment@2 {
28-
target-path = "spi1/spidev@0";
29-
__dormant__ {
30-
status = "disabled";
31-
};
32-
};
33-
34-
fragment@3 {
35-
target-path = "spi1/spidev@1";
36-
__dormant__ {
37-
status = "disabled";
38-
};
39-
};
40-
41-
fragment@4 {
42-
target-path = "spi1/spidev@2";
43-
__dormant__ {
44-
status = "disabled";
45-
};
46-
};
47-
48-
fragment@5 {
49-
target-path = "spi2/spidev@0";
50-
__dormant__ {
51-
status = "disabled";
52-
};
53-
};
54-
55-
fragment@6 {
56-
target-path = "spi2/spidev@1";
57-
__dormant__ {
58-
status = "disabled";
59-
};
60-
};
61-
62-
fragment@7 {
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target-path = "spi2/spidev@2";
64-
__dormant__ {
65-
status = "disabled";
66-
};
67-
};
68-
69-
fragment@8 {
70-
target = <&gpio>;
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__overlay__ {
72-
mcp2515_pins: mcp2515_pins {
73-
brcm,pins = <25>;
74-
brcm,function = <BCM2835_FSEL_GPIO_IN>;
75-
};
76-
};
77-
};
78-
79-
fragment@9 {
80-
target-path = "/clocks";
81-
__overlay__ {
82-
clk_mcp2515_osc: mcp2515-osc {
83-
#clock-cells = <0>;
84-
compatible = "fixed-clock";
85-
clock-frequency = <16000000>;
86-
};
87-
};
88-
};
89-
90-
mcp2515_frag: fragment@10 {
91-
target = <&spi0>;
92-
__overlay__ {
93-
status = "okay";
94-
#address-cells = <1>;
95-
#size-cells = <0>;
96-
97-
mcp2515: mcp2515@0 {
98-
compatible = "microchip,mcp2515";
99-
reg = <0>;
100-
pinctrl-names = "default";
101-
pinctrl-0 = <&mcp2515_pins>;
102-
spi-max-frequency = <10000000>;
103-
interrupt-parent = <&gpio>;
104-
interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
105-
clocks = <&clk_mcp2515_osc>;
106-
};
107-
};
108-
};
109-
110-
__overrides__ {
111-
spi0-0 = <0>, "+0",
112-
<&mcp2515_frag>, "target:0=", <&spi0>,
113-
<&mcp2515>, "reg:0=0",
114-
<&mcp2515_pins>, "name=mcp2515_spi0_0_pins",
115-
<&clk_mcp2515_osc>, "name=mcp2515-spi0-0-osc";
116-
spi0-1 = <0>, "+1",
117-
<&mcp2515_frag>, "target:0=", <&spi0>,
118-
<&mcp2515>, "reg:0=1",
119-
<&mcp2515_pins>, "name=mcp2515_spi0_1_pins",
120-
<&clk_mcp2515_osc>, "name=mcp2515-spi0-1-osc";
121-
spi1-0 = <0>, "+2",
122-
<&mcp2515_frag>, "target:0=", <&spi1>,
123-
<&mcp2515>, "reg:0=0",
124-
<&mcp2515_pins>, "name=mcp2515_spi1_0_pins",
125-
<&clk_mcp2515_osc>, "name=mcp2515-spi1-0-osc";
126-
spi1-1 = <0>, "+3",
127-
<&mcp2515_frag>, "target:0=", <&spi1>,
128-
<&mcp2515>, "reg:0=1",
129-
<&mcp2515_pins>, "name=mcp2515_spi1_1_pins",
130-
<&clk_mcp2515_osc>, "name=mcp2515-spi1-1-osc";
131-
spi1-2 = <0>, "+4",
132-
<&mcp2515_frag>, "target:0=", <&spi1>,
133-
<&mcp2515>, "reg:0=2",
134-
<&mcp2515_pins>, "name=mcp2515_spi1_2_pins",
135-
<&clk_mcp2515_osc>, "name=mcp2515-spi1-2-osc";
136-
spi2-0 = <0>, "+5",
137-
<&mcp2515_frag>, "target:0=", <&spi2>,
138-
<&mcp2515>, "reg:0=0",
139-
<&mcp2515_pins>, "name=mcp2515_spi2_0_pins",
140-
<&clk_mcp2515_osc>, "name=mcp2515-spi2-0-osc";
141-
spi2-1 = <0>, "+6",
142-
<&mcp2515_frag>, "target:0=", <&spi2>,
143-
<&mcp2515>, "reg:0=1",
144-
<&mcp2515_pins>, "name=mcp2515_spi2_1_pins",
145-
<&clk_mcp2515_osc>, "name=mcp2515-spi2-1-osc";
146-
spi2-2 = <0>, "+7",
147-
<&mcp2515_frag>, "target:0=", <&spi2>,
148-
<&mcp2515>, "reg:0=2",
149-
<&mcp2515_pins>, "name=mcp2515_spi2_2_pins",
150-
<&clk_mcp2515_osc>, "name=mcp2515-spi2-2-osc";
151-
oscillator = <&clk_mcp2515_osc>, "clock-frequency:0";
152-
speed = <&mcp2515>, "spi-max-frequency:0";
153-
interrupt = <&mcp2515_pins>, "brcm,pins:0",
154-
<&mcp2515>, "interrupts:0";
155-
};
156-
};
11+
compatible = "brcm,bcm2835";
12+
13+
fragment@0 {
14+
target = <&spidev0>;
15+
__dormant__ {
16+
status = "disabled";
17+
};
18+
};
19+
20+
fragment@1 {
21+
target = <&spidev1>;
22+
__dormant__ {
23+
status = "disabled";
24+
};
25+
};
26+
27+
fragment@2 {
28+
target-path = "spi1/spidev@0";
29+
__dormant__ {
30+
status = "disabled";
31+
};
32+
};
33+
34+
fragment@3 {
35+
target-path = "spi1/spidev@1";
36+
__dormant__ {
37+
status = "disabled";
38+
};
39+
};
40+
41+
fragment@4 {
42+
target-path = "spi1/spidev@2";
43+
__dormant__ {
44+
status = "disabled";
45+
};
46+
};
47+
48+
fragment@5 {
49+
target-path = "spi2/spidev@0";
50+
__dormant__ {
51+
status = "disabled";
52+
};
53+
};
54+
55+
fragment@6 {
56+
target-path = "spi2/spidev@1";
57+
__dormant__ {
58+
status = "disabled";
59+
};
60+
};
61+
62+
fragment@7 {
63+
target-path = "spi2/spidev@2";
64+
__dormant__ {
65+
status = "disabled";
66+
};
67+
};
68+
69+
fragment@8 {
70+
target-path = "spi3/spidev@0";
71+
__dormant__ {
72+
status = "disabled";
73+
};
74+
};
75+
76+
fragment@9 {
77+
target-path = "spi3/spidev@1";
78+
__dormant__ {
79+
status = "disabled";
80+
};
81+
};
82+
83+
fragment@10 {
84+
target-path = "spi5/spidev@0";
85+
__dormant__ {
86+
status = "disabled";
87+
};
88+
};
89+
90+
fragment@11 {
91+
target-path = "spi5/spidev@1";
92+
__dormant__ {
93+
status = "disabled";
94+
};
95+
};
96+
97+
fragment@12 {
98+
target = <&gpio>;
99+
__overlay__ {
100+
mcp2515_pins: mcp2515_pins {
101+
brcm,pins = <25>;
102+
brcm,function = <BCM2835_FSEL_GPIO_IN>;
103+
};
104+
};
105+
};
106+
107+
fragment@13 {
108+
target-path = "/clocks";
109+
__overlay__ {
110+
clk_mcp2515_osc: mcp2515-osc {
111+
#clock-cells = <0>;
112+
compatible = "fixed-clock";
113+
clock-frequency = <16000000>;
114+
};
115+
};
116+
};
117+
118+
mcp2515_frag: fragment@14 {
119+
target = <&spi0>;
120+
__overlay__ {
121+
status = "okay";
122+
#address-cells = <1>;
123+
#size-cells = <0>;
124+
125+
mcp2515: mcp2515@0 {
126+
compatible = "microchip,mcp2515";
127+
reg = <0>;
128+
pinctrl-names = "default";
129+
pinctrl-0 = <&mcp2515_pins>;
130+
spi-max-frequency = <10000000>;
131+
interrupt-parent = <&gpio>;
132+
interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
133+
clocks = <&clk_mcp2515_osc>;
134+
};
135+
};
136+
};
137+
138+
__overrides__ {
139+
spi0-0 = <0>, "+0",
140+
<&mcp2515_frag>, "target:0=", <&spi0>,
141+
<&mcp2515>, "reg:0=0",
142+
<&mcp2515_pins>, "name=mcp2515_spi0_0_pins",
143+
<&clk_mcp2515_osc>, "name=mcp2515-spi0-0-osc";
144+
spi0-1 = <0>, "+1",
145+
<&mcp2515_frag>, "target:0=", <&spi0>,
146+
<&mcp2515>, "reg:0=1",
147+
<&mcp2515_pins>, "name=mcp2515_spi0_1_pins",
148+
<&clk_mcp2515_osc>, "name=mcp2515-spi0-1-osc";
149+
150+
spi1-0 = <0>, "+2",
151+
<&mcp2515_frag>, "target:0=", <&spi1>,
152+
<&mcp2515>, "reg:0=0",
153+
<&mcp2515_pins>, "name=mcp2515_spi1_0_pins",
154+
<&clk_mcp2515_osc>, "name=mcp2515-spi1-0-osc";
155+
spi1-1 = <0>, "+3",
156+
<&mcp2515_frag>, "target:0=", <&spi1>,
157+
<&mcp2515>, "reg:0=1",
158+
<&mcp2515_pins>, "name=mcp2515_spi1_1_pins",
159+
<&clk_mcp2515_osc>, "name=mcp2515-spi1-1-osc";
160+
spi1-2 = <0>, "+4",
161+
<&mcp2515_frag>, "target:0=", <&spi1>,
162+
<&mcp2515>, "reg:0=2",
163+
<&mcp2515_pins>, "name=mcp2515_spi1_2_pins",
164+
<&clk_mcp2515_osc>, "name=mcp2515-spi1-2-osc";
165+
166+
spi2-0 = <0>, "+5",
167+
<&mcp2515_frag>, "target:0=", <&spi2>,
168+
<&mcp2515>, "reg:0=0",
169+
<&mcp2515_pins>, "name=mcp2515_spi2_0_pins",
170+
<&clk_mcp2515_osc>, "name=mcp2515-spi2-0-osc";
171+
spi2-1 = <0>, "+6",
172+
<&mcp2515_frag>, "target:0=", <&spi2>,
173+
<&mcp2515>, "reg:0=1",
174+
<&mcp2515_pins>, "name=mcp2515_spi2_1_pins",
175+
<&clk_mcp2515_osc>, "name=mcp2515-spi2-1-osc";
176+
spi2-2 = <0>, "+7",
177+
<&mcp2515_frag>, "target:0=", <&spi2>,
178+
<&mcp2515>, "reg:0=2",
179+
<&mcp2515_pins>, "name=mcp2515_spi2_2_pins",
180+
<&clk_mcp2515_osc>, "name=mcp2515-spi2-2-osc";
181+
182+
spi3-0 = <0>, "+8",
183+
<&mcp2515_frag>, "target:0=", <&spi3>,
184+
<&mcp2515>, "reg:0=0",
185+
<&mcp2515_pins>, "name=mcp2515_spi3_0_pins",
186+
<&clk_mcp2515_osc>, "name=mcp2515-spi3-0-osc";
187+
spi3-1 = <0>, "+9",
188+
<&mcp2515_frag>, "target:0=", <&spi3>,
189+
<&mcp2515>, "reg:0=1",
190+
<&mcp2515_pins>, "name=mcp2515_spi3_1_pins",
191+
<&clk_mcp2515_osc>, "name=mcp2515-spi3-1-osc";
192+
193+
spi5-0 = <0>, "+10",
194+
<&mcp2515_frag>, "target:0=", <&spi5>,
195+
<&mcp2515>, "reg:0=0",
196+
<&mcp2515_pins>, "name=mcp2515_spi5_0_pins",
197+
<&clk_mcp2515_osc>, "name=mcp2515-spi5-0-osc";
198+
spi5-1 = <0>, "+11",
199+
<&mcp2515_frag>, "target:0=", <&spi5>,
200+
<&mcp2515>, "reg:0=1",
201+
<&mcp2515_pins>, "name=mcp2515_spi5_1_pins",
202+
<&clk_mcp2515_osc>, "name=mcp2515-spi5-1-osc";
203+
204+
oscillator = <&clk_mcp2515_osc>, "clock-frequency:0";
205+
speed = <&mcp2515>, "spi-max-frequency:0";
206+
interrupt = <&mcp2515_pins>, "brcm,pins:0",
207+
<&mcp2515>, "interrupts:0";
208+
};
209+
};

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