rtl: fix vendored whitespace lint

Author: phsauter

rtl/cve2/cve2_cs_registers.sv

@@ -1460,7 +1460,7 @@ import cve2_pkg::*;
       logic [63:0]   rvfi_named_csr_wmask;
       logic [63:0]   rvfi_named_csr_rdata;
       logic [63:0]   rvfi_named_csr_wdata;
-  
+
       // Generic READ/WRITE values
       logic [63:0]   rvfi_csr_addr;
       logic [63:0]   rvfi_csr_rmask;

rtl/cve2/cve2_decoder.sv

@@ -665,7 +665,7 @@ module cve2_decoder #(
         rf_ren_b_o       = x_issue_resp_register_read_i[1];
         rf_we            = x_issue_resp_writeback_i;
         rf_wdata_sel_o   = $bits(rf_wdata_sel_o)'({RF_WD_COPROC});
-      end 
+      end
     end
   end
 

rtl/cve2/cve2_id_stage.sv

@@ -898,7 +898,7 @@ module cve2_id_stage #(
         RF_WD_EX,
         RF_WD_CSR,
         RF_WD_COPROC})
-  end 
+  end
   else begin : no_gen_asserts_xif
     `ASSERT(IbexRegfileWdataSelValid, instr_valid_i |-> rf_wdata_sel inside {
         RF_WD_EX,

rtl/cve2/cve2_if_stage.sv

@@ -179,10 +179,10 @@ module cve2_if_stage import cve2_pkg::*; (
 
   `ifndef SYNTHESIS
     // (As instroduced on the Ibex core project)
-    // Needed by the RISC-V compliance checking simulation model for linking 
-    // against C++ testbench code, that expects the simutil_get_scramble_key 
+    // Needed by the RISC-V compliance checking simulation model for linking
+    // against C++ testbench code, that expects the simutil_get_scramble_key
     // or simutil_get_scramble_nonce functions.
-    // As a slightly ugly hack, let's define the DPI functions here (the 
+    // As a slightly ugly hack, let's define the DPI functions here (the
     // real versions are defined in prim_util_get_scramble_params.svh)
     export "DPI-C" function simutil_get_scramble_key;
     export "DPI-C" function simutil_get_scramble_nonce;

rtl/cve2/cve2_pmp.sv

@@ -3,7 +3,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-// The CVE2 does not officially support Physical Memory Protection (PMP), as 
+// The CVE2 does not officially support Physical Memory Protection (PMP), as
 // defined by rule PVL-40 of the CV32E20 core functional requirements.
 
 module cve2_pmp #(

rtl/riscv-dbg/dmi_test.sv

@@ -334,4 +334,4 @@ package dmi_test;
     endtask
   endclass
 
-endpackage
+endpackage

rtl/riscv-dbg/tb/jtag_test_simple.sv

@@ -377,4 +377,4 @@ module riscv_dbg_simple #(
     end
   endtask
 
-endmodule
+endmodule