xilinx: update compile file list

Author: phsauter

xilinx/scripts/add_sources.genesys2.tcl

@@ -1,14 +1,24 @@
+# Copyright (c) 2024 ETH Zurich and University of Bologna.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+#
 # This script was generated automatically by bender.
 set ROOT "../../.."
+
+# Package(tech_cells_generic) Target(all(any(fpga, tech_cells_generic_include_xilinx_xpm), not(tech_cells_generic_exclude_xilinx_xpm)))
 add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/tech_cells_generic/fpga/pad_functional_xilinx.sv \
     $ROOT/rtl/tech_cells_generic/fpga/tc_clk_xilinx.sv \
     $ROOT/rtl/tech_cells_generic/fpga/tc_sram_xilinx.sv \
     $ROOT/rtl/tech_cells_generic/tc_sram_impl.sv \
 ]
+
+# Package(common_cells) Target(*)
 add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/common_cells/binary_to_gray.sv \
 ]
+
+# Package(common_cells) Target(not(all(vivado_ipx, xilinx)))
 add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/common_cells/cb_filter_pkg.sv \
     $ROOT/rtl/common_cells/cc_onehot.sv \
@@ -63,6 +73,8 @@ add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/common_cells/addr_decode_napot.sv \
     $ROOT/rtl/common_cells/multiaddr_decode.sv \
 ]
+
+# Package(common_cells) Target(not(all(vivado_ipx, xilinx)))
 add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/common_cells/cb_filter.sv \
     $ROOT/rtl/common_cells/cdc_fifo_2phase.sv \
@@ -95,6 +107,8 @@ add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/common_cells/stream_omega_net.sv \
     $ROOT/rtl/common_cells/mem_to_banks.sv \
 ]
+
+# Package(obi) Target(*)
 add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/obi/obi_pkg.sv \
     $ROOT/rtl/obi/obi_intf.sv \
@@ -109,9 +123,13 @@ add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/obi/obi_sram_shim.sv \
     $ROOT/rtl/obi/obi_xbar.sv \
 ]
+
+# Package(apb) Target(*)
 add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/apb/apb_pkg.sv \
 ]
+
+# Package(cve2) Target(*)
 add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/cve2/cve2_pkg.sv \
     $ROOT/rtl/cve2/cve2_alu.sv \
@@ -135,6 +153,24 @@ add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/cve2/cve2_if_stage.sv \
     $ROOT/rtl/cve2/cve2_core.sv \
 ]
+
+# Package(idma) Target(*)
+add_files -norecurse -fileset [current_fileset] [list \
+    $ROOT/rtl/idma/idma_pkg.sv \
+    $ROOT/rtl/idma/idma_channel_coupler.sv \
+    $ROOT/rtl/idma/idma_dataflow_element.sv \
+    $ROOT/rtl/idma/idma_obi_read.sv \
+    $ROOT/rtl/idma/idma_obi_write.sv \
+    $ROOT/rtl/idma/idma_nd_midend.sv \
+    $ROOT/rtl/idma/idma_transfer_id_gen.sv \
+    $ROOT/rtl/idma/idma_legalizer_page_splitter.sv \
+    $ROOT/rtl/idma/idma_transport_layer_rw_obi.sv \
+    $ROOT/rtl/idma/idma_legalizer_rw_obi.sv \
+    $ROOT/rtl/idma/idma_backend_rw_obi.sv \
+    $ROOT/rtl/idma/croc_idma.sv \
+]
+
+# Package(obi_peripherals) Target(*)
 add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/obi_uart/obi_uart_pkg.sv \
     $ROOT/rtl/obi_uart/obi_uart_baudgen.sv \
@@ -145,6 +181,8 @@ add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/obi_uart/obi_uart_register.sv \
     $ROOT/rtl/obi_uart/obi_uart.sv \
 ]
+
+# Package(riscv-dbg) Target(*)
 add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/riscv-dbg/dm_pkg.sv \
     $ROOT/rtl/riscv-dbg/debug_rom/debug_rom.sv \
@@ -153,15 +191,21 @@ add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/riscv-dbg/dm_mem.sv \
     $ROOT/rtl/riscv-dbg/dmi_cdc.sv \
 ]
+
+# Package(riscv-dbg) Target(not(all(bscane, xilinx)))
 add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/riscv-dbg/dmi_jtag_tap.sv \
 ]
+
+# Package(riscv-dbg) Target(*)
 add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/riscv-dbg/dm_sba.sv \
     $ROOT/rtl/riscv-dbg/dm_top.sv \
     $ROOT/rtl/riscv-dbg/dmi_jtag.sv \
     $ROOT/rtl/riscv-dbg/dm_obi_top.sv \
 ]
+
+# Package(croc_soc) Target(*)
 add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/croc_pkg.sv \
     $ROOT/rtl/user_pkg.sv \
@@ -170,8 +214,11 @@ add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/clint/clint_reg_pkg.sv \
     $ROOT/rtl/obi_timer/obi_timer_reg_pkg.sv \
 ]
+
+# Package(croc_soc) Target(not(netlist_yosys))
 add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/core_wrap.sv \
+    $ROOT/rtl/bootrom/bootrom.sv \
     $ROOT/rtl/soc_ctrl/soc_ctrl_regs.sv \
     $ROOT/rtl/gpio/gpio_reg_top.sv \
     $ROOT/rtl/gpio/gpio.sv \
@@ -181,6 +228,8 @@ add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/rtl/user_domain.sv \
     $ROOT/rtl/croc_soc.sv \
 ]
+
+# Package(croc_soc) Target(genesys2)
 add_files -norecurse -fileset [current_fileset] [list \
     $ROOT/xilinx/hw/croc_xilinx.sv \
     $ROOT/xilinx/hw/fan_ctrl.sv \
@@ -190,13 +239,15 @@ set_property include_dirs [list \
     $ROOT/rtl/apb/include \
     $ROOT/rtl/common_cells/include \
     $ROOT/rtl/cve2/include \
+    $ROOT/rtl/idma/include \
     $ROOT/rtl/obi/include \
 ] [current_fileset]
 
 set_property include_dirs [list \
     $ROOT/rtl/apb/include \
     $ROOT/rtl/common_cells/include \
     $ROOT/rtl/cve2/include \
+    $ROOT/rtl/idma/include \
     $ROOT/rtl/obi/include \
 ] [current_fileset -simset]