[P1][EVIDENCE] Collect and organize v0.2.0 release evidence

[hkimw]

Purpose

Release readiness tracker for v0.2.0. This issue tracks the collection and organization of evidence needed before a production release can be tagged. It does not claim timing is closed or that KV260 inference works — this is a preparation checklist, not a completion announcement.

Evidence required before v0.2.0 tag

Simulation logs

• All P0/P1 testbenches passing (currently 6/7; tb_GEMM_fmap_staggered_delay is FAIL — tracked in [P2][GEMM] Re-enable tb_GEMM_fmap_staggered_delay after INT8 transition #28)
• E2E NPU_top integration TB added and green ([P0][NPU_TOP] Add minimal NPU_top end-to-end integration TB #37)
• BF16→INT8 preprocess golden-model TB added ([P0][TB] Add preprocess BF16 to INT8 golden-model testbench #33)
• .pccx trace artifacts and xsim logs retained at known paths

Synthesis / implementation

• Post-synthesis timing already recorded (Vivado v2025.2, 2026-04-20)
  • core_clk WNS = −9.792 ns (post-synth, NOT MET — pessimistic before place-and-route)
  • axi_clk WNS = +2.253 ns (MET)
  • Post-synth utilization: 5 611 LUTs, 8 458 FFs, 80 RAMB36, 56 URAM, 4 DSP
• Post-implementation timing closure run and results recorded ([P2][IMPL] Run post-implementation timing closure and bitstream smoke plan #29)
• WNS/TNS for both clocks documented in release notes

KV260 bring-up (none completed yet)

• Bitstream generated and SHA recorded
• Boot sequence documented
• UART/JTAG console log captured
• Observed behavior and failure modes noted

Reproducibility

• Exact simulation commands documented
• Required Vivado version and hardware noted
• Contributor path without hardware documented

Reference

• See docs/RELEASE_EVIDENCE_CHECKLIST.md (PR docs: add FPGA release evidence checklist #57) for the full per-item template
• EPIC: [EPIC] v002 correctness, bring-up, and hardware closure tracking #43
• Post-impl timing closure: [P2][IMPL] Run post-implementation timing closure and bitstream smoke plan #29, [P1][SYNTH] Run Vivado synth and record timing/resource baseline #42
• Current post-synth reports: hw/build/reports/

[hkimw]

Maintainer audit update — 2026-05-03

This evidence tracker body is partially stale and should not be used as-is for AI-worker task generation without this update.

Current evidence state:

• xsim/full local runner evidence has advanced to 11 passed / 0 failed in the current v002 validation flow.
• tb_GEMM_fmap_staggered_delay is no longer the old blocker described by the original checklist; the current runner includes the v002 runtime smoke program as well.
• Vivado compile/top elaboration is available from the local candidate flow.
• Recent local Vivado synth attempts complete and produce timing reports, but timing is not closed.
• Timing state should be treated as TIMING_REPORT_PRESENT_NOT_CLOSED, not as closure.
• KV260 smoke/runtime remains blocked until board/model/bitstream/runtime inputs and logs exist.
• Throughput remains MEASUREMENT_NOT_AVAILABLE; 20 tok/s is a target only.

Release blockers that still remain:

• post-synth timing closure
• post-implementation timing report
• implementation completion evidence
• bitstream generation evidence
• KV260 board logs
• Gemma 3N E4B runtime logs
• measured throughput evidence

No release/tag should be cut from this state. Do not claim KV260 inference, Gemma 3N E4B hardware execution, timing closure, production readiness, stable release, or 20 tok/s achieved until the corresponding evidence is present.

[hkimw]

Status update — 2026-05-08

No new evidence collected in the AC-102 pass. Every checkbox in
this issue stays unchecked. In particular:

• No bitstream has been generated.
• No bitstream SHA has been recorded.
• No KV260 boot sequence has been documented.
• No KV260 runtime token-stream has been captured.
• Post-implementation timing closure has not been run.
• No throughput number has been measured.
• The 6/7 P0/P1 testbench gap and tb_GEMM_fmap_staggered_delay
  failure ([P2][GEMM] Re-enable tb_GEMM_fmap_staggered_delay after INT8 transition #28) are still open.

Nothing in AC-102 implies otherwise. The public wording scan
confirms that no claim of KV260 inference, Gemma 3N E4B operation,
20 tok/s, timing closure, bitstream readiness, or production
readiness has slipped into the public docs.

The next gate before any of these checkboxes can move is the
single CVO SFU reciprocal / product timing-cut work item described
in EPIC #43; bitstream / runtime work is downstream of that.

This issue stays open as the release-readiness tracker. It is not
a release announcement and must not be cited as such.

[hkimw]

Evidence update for 2026-06-01:

• Fixed-RTL module/testbench diagnosis: xsim 16/16 PASS.
• Generated BD contract gates: topology, AXI attribute, AXI address, AXI transaction all PASS.
• Full BD bitstream: PASS, post-impl WNS +0.434 ns, DRC 0 errors.
• Local artifacts recorded in deploy workspace:
  • new-bits/pccx_v23_fixedrtl_full_bd.bit, SHA-256 5c9604abbe3e18f17da657ae58342cfbfa1e7c5a4a333d9aaf3c4d01f23395dc.
  • new-bits/pccx_npu_bd_v23_fixedrtl_full_bd.bit.bin, SHA-256 8da91a3be8633b7105bda0446a2ee367098a35b2007fe46c1d25c59c2d05cb54.
  • new-bits/timing_summary_v23_fixedrtl_full_bd_post_impl.rpt.
  • new-bits/drc_v23_fixedrtl_full_bd_post_impl.rpt.
• Board-dependent evidence is pending in test(board): retest v24 deepverify DataMover status matrix #157 because KV260 is powered off.

[hkimw]

Evidence update - 2026-06-03 v29

New release-evidence items collected for the v29 instruction/fmap alignment pass:

• Public RTL PR merged: fix(rtl): align GEMM inst valid to fmap broadcast pccx-v002#15.
• Merge commit: 01d483abc07845c28ed61746dfd412bd115c09a4.
• Root cause addressed: GEMM instruction flags from Global_Scheduler needed to be sampled after registration and pulsed into the systolic core on the first fmap-valid edge.
• Targeted xsim: PASS 5/5.
• Full xsim regression: PASS 29/29.
• Full BD implementation: FULL_TOP_FLOW_IMPL_MET.
• Timing: WNS +2.598 ns, TNS 0.000 ns, WHS +0.010 ns, 0 failing endpoints.
• DRC: 0 errors.
• Deploy .bit: pccx_v29_instalign_20260603T064753Z.bit, SHA-256 ac9eabf11502840db8de7f6cb7f67124777eb83e13dc53d45516badfd90f0c3e.
• Deploy .bit.bin: pccx_npu_bd_v29_instalign_20260603T064753Z.bit.bin, SHA-256 8da8b7a2b58497d8adfdfd6998274d78ea50763397a083281eb6459d9ede871d, MD5 06fcc0d825ee8ffdb782d098131cf6b7.
• KV260 board: image loaded, /dev/uio4 = pccx-npu, Stage0 reload/no-reload/reload PASS, Stage 1A HP0/HP1 weight ingress PASS, post-Stage1 Stage0 PASS.

This advances the bitstream, timing, DRC, and KV260 smoke evidence. Full Stage 1 GEMM result validation remains tracked in #154.