Is there a Linux driver for "soft" coreSPI?

[rary21]

Hi, I'd like to add a coreSPI module in fabric.

SPI module in MSS uses spi-microchip-core.c .
However, this driver seems incompatible with coreSPI found below
because INT_CLEAR register offset is different.
https://www.microsemi.com/document-portal/doc_view/1245299-corespi-hb
The commit message of spi-microchip-core.c says that it is for "hard" controller
so I guess there is no driver availble for coreSPI in fabric.

Is my understanding correct?

[eppidei]

Hi @rary21 you are correct. It will be available in next releases but I cannot give you a timeline at the moment.

[rary21]

Thank you! I got it.

[RossWilliamson]

Following as I also would like a driver for the soft coreSPI

[ddbabich]

Are there any updates on the release of a Linux soft core SPI driver? I'm also interested.
Thanks

[RossWilliamson]

Is there any update when this driver will be availble?

[rockoguido]

hello for driver for devices in the fabric see
https://github.com/Mi-V-Soft-RISC-V/miv-rv32-bare-metal-examples/tree/main/driver-examples/
amongst those you will find a corespi driver that uses the spi from the ESS.
These examples target a few of our boards, in particular our Eval board based on the 300T

[RossWilliamson]

Thanks - I think we are both looking for a linux kernel driver to expose it as a spidev device via device-tree

[rockoguido]

Hi... I don't have any updates for you at this time... Regards, Dave Campanella Principal Embedded Solutions Engineer / FAE Microchip Technology Inc. 165 Technology Dr Irvine, CA 92618 +1 925 989 0569 (mobile) +1 760 304 0172 (office) ***@***.******@***.***> [cid:3e56fdc9-4bc6-485d-b931-b095856fdffb]

…

________________________________ From: Ross Williamson ***@***.***> Sent: Tuesday, June 10, 2025 8:07 AM To: polarfire-soc/polarfire-soc-documentation ***@***.***> Cc: Dave Campanella - C68141 ***@***.***>; Comment ***@***.***> Subject: Re: [polarfire-soc/polarfire-soc-documentation] Is there a Linux driver for "soft" coreSPI? (Discussion #472) EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe Is there any update when this driver will be availble? — Reply to this email directly, view it on GitHub<#472 (reply in thread)>, or unsubscribe<https://github.com/notifications/unsubscribe-auth/AXJPF6YQCKBY6BCQIEHDLE33C3YB5AVCNFSM6AAAAABKSP2BMCVHI2DSMVQWIX3LMV43URDJONRXK43TNFXW4Q3PNVWWK3TUHMYTGNBSGI2TSMY>. You are receiving this because you commented.Message ID: ***@***.***>

[RossWilliamson]

Just wondering if it was being actively worked on or if it would be something the community could help with (but not me I'm no good at Kernel development)

[rockoguido]

Hello. Well I do have an example where I added a UART (16550) based into the fabric and can access from the MSS running Linux. There are few steps...

1. Naturally on the fabric side had to add the extra logic to support this added UART, via the APB bus and using FIC3 for the MSS to Fabric Interconnect
2. On the Yocto Linux had to patch the device tree in order to add this UART , patch was mostly about the Interrupt Number and other UART related parameters
3. A new driver was not required since the other MSS Uarts are 16550 compliant.
4. those are the steps in summary, my first thoughts about a SPI device in the fabric that can be access via Linux is that one would NOT use the ESS (which has SPI capability along with other serialized devices), you would pull in a dedicated SPI based IP that hopefully is based on the SPI block within the MSS, that way the driver is mostly done, I have yet to look at this but it is on our list.
5. I hope that gives you a little insight
6. Regards.
7. Dave Campanella

[Quinn17]

I Dave,

I was wondering if you could share the device tree patch you used for the UART. I am trying to do the same thing (using FIC3 CoreUARTTapbC0) but I am struggling. I'm using an overlay to test it first, but it doesn't seem to work (I see it binding on ttyS2 but the message I send are received as /0/0/0 from my analyzer). Here is my overlay :

/dts-v1/;
/plugin/;

/ {
    compatible = "microchip,mpfs";

    fragment@0 {
        target-path = "/fabric-bus@40000000";
        __overlay__ {
            uart@40000300 {
                compatible = "ns16550a";
                reg = <0x00 0x40000300 0x00 0x100>;
                reg-shift = <2>;                  // Common for memory-mapped 16550
                reg-io-width = <4>;               // 4 bytes per register
                clock-frequency = <50000000>;     // Adjust based on your IP configuration
                current-speed = <115200>;
                status = "okay";
            };
        };
    };
};

Thanks,
Quentin

PS : I am new to Yocto and Linux device trees.

[prajnark]

Hi @rary21 @RossWilliamson,

Support for the Soft CoreSPI Linux driver is now available in Microchip’s linux4microchip kernel tree, and on the master branches of Buildroot and Yocto.

Linux kernel tree: https://github.com/linux4microchip/linux
Buildroot: https://github.com/linux4microchip/buildroot-external-microchip
Yocto: https://github.com/linux4microchip/meta-mchp

Best regards,
Prajna