fix: real-bug warnings + ISA-dispatch CMake stale ref

salvages the in-flight warning-cleanup pass. focuses on the warnings
that indicate genuine defects, leaves cosmetic conversion warnings
alone (-Wsign-conversion, -Wconversion, -Wfloat-conversion remain
for a separate pass).

real fixes:
  - CMakeLists.txt: ISA-dispatch branch still referenced src/core/conv.c
    (no longer exists post K.2 split). would break the dispatch build
    on first user that turns AX_CPU_ISA_DISPATCH=ON. replaced with the
    seven conv/*.c files matching the non-dispatch source list.
  - cpu_opt.c: ax_cpu_opt_init_impl ignored fscanf return values (3
    sites parsing /sys cache-info). added explicit lvl_ok / type_ok /
    size_ok checks; on parse failure we skip the cache-index entry
    instead of using uninitialised data.
  - cpu_opt.c: ax_compute_proportional_chunks + opt_gemm_strassen_1lvl
    are intentionally retained (scaffolding for future phases) but
    triggered -Wunused-function. marked with __attribute__((unused))
    + a comment explaining why the symbol stays.
  - attention.c: dropped pf_dbqkv from the profiling tracker tuple
    (never read; the bias-grad accumulation goes through the same
    pf_dwqkv counter).
  - init.c: ax_init() called ax_calibrate_hybrid_crossover and
    ax_measure_thread_speeds without a declaration. added the missing
    #include "axiom/internal/compute_internal.h" + appended the two
    decls to that header (they were defined in dispatch.c without a
    prototype anywhere — implicit-function-declaration warning).
  - conv/backward.c, bench_conv_suite.c, bench_ops_suite.c, test_conv.c:
    misleading-indentation, unused-variable cleanups.

ci.yml: contains the M.3 valgrind job staged into local main from
the agent worktree merge prep — keeping it here so the next commit
(merge of ci/m3-valgrind-nightly) is a no-op merge.

verified: 29/29 ctest pass, no new warnings from the touched files.

remaining warning classes (deferred):
  140 -Wsign-conversion (mostly int64_t↔size_t in tight loops)
   38 -Wconversion (int64_t→double for FLOPs metric calc)
   23 -Wfloat-conversion (RAND_MAX→float; bench bookkeeping)
   16 -Wpedantic (mostly variadic-macro-extension in test asserts)

Author: neofytr

CMakeLists.txt

@@ -246,7 +246,13 @@ if(CMAKE_SYSTEM_PROCESSOR MATCHES "x86_64|AMD64|amd64|i[3-6]86")
         src/core/activations.c
         src/core/attention.c
         src/core/autograd_ops.c
-        src/core/conv.c
+        src/core/conv/backward.c
+        src/core/conv/conv_bn_relu.c
+        src/core/conv/direct.c
+        src/core/conv/forward.c
+        src/core/conv/im2col.c
+        src/core/conv/pool.c
+        src/core/conv/winograd.c
         src/core/losses.c
         src/core/norm.c
         src/core/optim.c

benchmarks/bench_conv_suite.c

@@ -62,7 +62,8 @@ static void bench_conv_bn_relu(int N, int C_in, int H, int W, int C_out, int K,
     ax_tensor_destroy(probe);
 
     int iters = (int)(2e10 / conv_flops(N, C_in, C_out, H_out, W_out, K));
-    if (iters < 2) iters = 2; if (iters > 50) iters = 50;
+    if (iters < 2) iters = 2;
+    if (iters > 50) iters = 50;
 
     double t0 = bench_now_ms();
     for (int i = 0; i < iters; i++) {
@@ -86,7 +87,8 @@ static void bench_maxpool(int N, int C, int H, int W, int K, int stride) {
     ax_no_grad();
     for (int w = 0; w < 3; w++) { ax_tensor_t *y = ax_layer_forward(p, x); ax_tensor_destroy(y); }
     int iters = (int)(1e9 / (N * C * H * W));
-    if (iters < 5) iters = 5; if (iters > 500) iters = 500;
+    if (iters < 5) iters = 5;
+    if (iters > 500) iters = 500;
     double t0 = bench_now_ms();
     for (int i = 0; i < iters; i++) { ax_tensor_t *y = ax_layer_forward(p, x); ax_tensor_destroy(y); }
     double lat = (bench_now_ms() - t0) / iters;
@@ -105,7 +107,8 @@ static void bench_maxpool_nhwc(int N, int C, int H, int W, int K, int stride) {
     ax_no_grad();
     for (int w = 0; w < 3; w++) { ax_tensor_t *y = ax_layer_forward(p, x); ax_tensor_destroy(y); }
     int iters = (int)(1e9 / (N * C * H * W));
-    if (iters < 5) iters = 5; if (iters > 500) iters = 500;
+    if (iters < 5) iters = 5;
+    if (iters > 500) iters = 500;
     double t0 = bench_now_ms();
     for (int i = 0; i < iters; i++) { ax_tensor_t *y = ax_layer_forward(p, x); ax_tensor_destroy(y); }
     double lat = (bench_now_ms() - t0) / iters;
@@ -129,7 +132,8 @@ static void bench_conv_nhwc(int N, int C_in, int H, int W, int C_out, int K, int
     int W_out = (int)probe->shape[2];
     ax_tensor_destroy(probe);
     int iters = (int)(2e10 / conv_flops(N, C_in, C_out, H_out, W_out, K));
-    if (iters < 2) iters = 2; if (iters > 50) iters = 50;
+    if (iters < 2) iters = 2;
+    if (iters > 50) iters = 50;
     double t0 = bench_now_ms();
     for (int i = 0; i < iters; i++) { ax_tensor_t *y = ax_layer_forward(conv, x); ax_tensor_destroy(y); }
     double lat = (bench_now_ms() - t0) / iters;

benchmarks/bench_ops_suite.c

@@ -81,7 +81,8 @@ static void bench_softmax(int64_t rows, int64_t cols) {
     int64_t sh[] = {rows, cols};
     ax_tensor_t *x = ax_tensor_rand(sh, 2, -1.0f, 1.0f);
     int iters = (int)(5e8 / (rows * cols));
-    if (iters < 10) iters = 10; if (iters > 2000) iters = 2000;
+    if (iters < 10) iters = 10;
+    if (iters > 2000) iters = 2000;
     for (int w = 0; w < 3; w++) { ax_tensor_t *y = ax_softmax(x, 1); ax_tensor_destroy(y); }
     double t0 = bench_now_ms();
     for (int i = 0; i < iters; i++) {

include/axiom/internal/compute_internal.h

@@ -56,6 +56,17 @@ void ax_calibrate_thresholds(void);
    pick the best. opt-in via AX_GEMM_CALIBRATE=1 (adds ~500 ms startup). */
 void ax_calibrate_gemm_tiles(void);
 
+/* hybrid CPU fast-vs-all crossover calibration. measures gemm throughput
+   on a representative shape and derives the FLOPs threshold above which
+   spreading work to all cores beats fast-only. cheap (~30ms). no-op on
+   non-hybrid CPUs and under AX_NO_AUTOTUNE=1. */
+void ax_calibrate_hybrid_crossover(void);
+
+/* phase 34: measure each omp thread's relative throughput so gemm work
+   distribution can be weighted proportionally. cheap (~5ms). no-op under
+   AX_NO_AUTOTUNE=1 or without openmp. */
+void ax_measure_thread_speeds(void);
+
 #ifdef __cplusplus
 }
 #endif

src/compute/backends/cpu_opt.c

@@ -543,7 +543,11 @@ static int    ax_n_thread_speeds = 0;
 /* compute per-thread (begin, end) ranges for total_iters such that each
    thread's workload is proportional to its measured speed. preserves
    contiguity so existing pack_b cache reuse logic still hits.
-   when speeds aren't available, falls back to equal chunks. */
+   when speeds aren't available, falls back to equal chunks.
+   currently un-dispatched — wired in as part of phase 34 once the gemm
+   driver opts into the per-thread weighted partition. retained so the
+   measurement (ax_thread_speeds) is consumable when dispatch flips on. */
+__attribute__((unused))
 static void ax_compute_proportional_chunks(int64_t total_iters, int n_threads,
                                             int64_t *out_begin, int64_t *out_end) {
     if (n_threads <= 0) return;
@@ -704,14 +708,18 @@ static void ax_cpu_opt_init_impl(void) {
                      "/sys/devices/system/cpu/cpu0/cache/index%d/level", idx);
             FILE *fl = fopen(path, "r");
             if (!fl) continue;
-            int lvl = 0; fscanf(fl, "%d", &lvl); fclose(fl);
-            if (lvl != 1) continue;
+            int lvl = 0;
+            int lvl_ok = fscanf(fl, "%d", &lvl);
+            fclose(fl);
+            if (lvl_ok != 1 || lvl != 1) continue;
             snprintf(path, sizeof(path),
                      "/sys/devices/system/cpu/cpu0/cache/index%d/type", idx);
             FILE *ft = fopen(path, "r");
             if (!ft) continue;
             char type[32] = {0};
-            fscanf(ft, "%31s", type); fclose(ft);
+            int type_ok = fscanf(ft, "%31s", type);
+            fclose(ft);
+            if (type_ok != 1) continue;
             if (strcmp(type, "Data") != 0 && strcmp(type, "Unified") != 0) continue;
             snprintf(path, sizeof(path),
                      "/sys/devices/system/cpu/cpu0/cache/index%d/size", idx);
@@ -2259,6 +2267,11 @@ AX_TLS float *tl_strassen_ta = NULL; AX_TLS int64_t tl_strassen_ta_bytes = 0;
 AX_TLS float *tl_strassen_tb = NULL; AX_TLS int64_t tl_strassen_tb_bytes = 0;
 AX_TLS float *tl_strassen_mi = NULL; AX_TLS int64_t tl_strassen_mi_bytes = 0;
 
+/* dispatch is currently disabled (see "Strassen 1-level helpers retained but
+   dispatch disabled" in commit 03ac6d4). kept here as scaffolding for the
+   eventual phase-25 reactivation; mark unused so -Wunused-function stays
+   silent until the dispatch site is added back. */
+__attribute__((unused))
 static ax_status_t opt_gemm_strassen_1lvl(const float *A, const float *B, float *C,
                                            int64_t N, int64_t lda, int64_t ldb, int64_t ldc) {
     int64_t n = N / 2;

src/core/attention.c

@@ -467,7 +467,7 @@ static void mha_backward(ax_grad_fn_t *self, ax_tensor_t *grad_out)
     if (prof_enabled < 0) prof_enabled = (getenv("AX_PROFILE_MHA") && getenv("AX_PROFILE_MHA")[0] == '1') ? 1 : 0;
     static __thread uint64_t pf_dout_copy=0, pf_wo_grad=0, pf_dattn=0,
                               pf_head_int=0, pf_sdpa_bwd=0, pf_deint=0,
-                              pf_dwqkv=0, pf_dbqkv=0, pf_dx=0;
+                              pf_dwqkv=0, pf_dx=0;
     static __thread int pf_calls = 0;
     /* high-frequency cycle counter for profile attribution (gated by
        AX_PROFILE_MHA=1). x86 reads rdtsc, aarch64 reads cntvct_el0;

src/core/conv/backward.c

@@ -94,7 +94,7 @@ void ax_conv_conv2d_backward(ax_grad_fn_t *self, ax_tensor_t *grad_out)
         float *dxd = (input_orig->requires_grad && input_orig->grad)
                      ? (float *)input_orig->grad->storage->data : NULL;
 
-        conv2d_nhwc_backward_impl(s,
+        ax_conv_nhwc_backward_impl(s,
             (const float *)input_data->storage->data,
             (const float *)grad_out->storage->data,
             (const float *)weight->storage->data,
@@ -453,7 +453,7 @@ void ax_conv_conv2d_backward(ax_grad_fn_t *self, ax_tensor_t *grad_out)
 }
 /* NHWC conv2d backward: produces dW, db, dX as needed. chunked per-sample
    to keep im2col_nhwc in L3 (matches forward's chunk strategy). */
-void conv2d_nhwc_backward_impl(
+void ax_conv_nhwc_backward_impl(
     struct ax_conv_scratch *s,
     const float *id,         /* input data [N, H, W, Cin] */
     const float *grd,        /* grad_out   [N, OH, OW, Cout] */

src/core/init.c

@@ -21,6 +21,7 @@
 #include "axiom/compute.h"
 #include "axiom/device.h"
 #include "axiom/internal/backend_ops.h"
+#include "axiom/internal/compute_internal.h"
 #include "axiom/rng.h"
 #include "axiom/error.h"
 #include <stdlib.h>

tests/test_conv.c

@@ -388,7 +388,8 @@ static void test_conv2d_subbatched_fwd_bwd(void)
        n_batch = 8MB/(K*M*4) = 4 → 2 chunks of 4 samples each. */
     int N = 8, Cin = 256, H = 14, W = 14, Cout = 32;
     int64_t M = (int64_t)H * W;
-    int64_t K = (int64_t)Cin * 9;
+    /* K = Cin * 9 = 2304 (documented in the header comment above for the
+       batch-split sizing — not needed at runtime here). */
 
     ax_layer_t *c = ax_conv2d_create(Cin, Cout, 3, 1, 1, false);
     ax_conv2d_t *cc = (ax_conv2d_t *)c;