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This repository was archived by the owner on Sep 2, 2023. It is now read-only.

Implement reloc relaxations #2

@mbitsnbites

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@mbitsnbites

There are a number of instruction pairs that can often be relaxed into single instructions. This includes:

addpchi lr, #foo@pchi
jl lr, #foo+4@pclo
⇩
jl pc, #foo@pc
addpchi x, #foo@pchi
ldw x, x, #foo+4@pclo
⇩
ldwpc x, #foo@pc
addpchi x, #foo@pchi
add/ldea x, x, #foo+4@pclo
⇩
addpc x, #foo@pc
ldhi lr, #foo@hi
jl lr, #foo@lo
⇩
jl z, #foo
ldi x, #foo@hi
add/or/ldea x, x, #foo@lo
⇩
ldi x, #foo

There are also a few combinations with side effects where relaxations (that would remove the side effects) might alter the meaning of the program. For instance memory store operations. Leave these for a later time. They may require ABI changes and compiler support (e.g. dedicating a scratch register for temporary address calculations that may be relaxed).

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