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Bug Fixes and improvements.
- Fix ECDH & ECDSA Co-existence limitation & issues. - Disable Chacha-poly, DH8K and SHA-3 by default. - Fix Engines install dir for OpenSSL 3.0 - Update README and specfile. Signed-off-by: Yogaraj Alamenda <yogarajx.alamenda@intel.com>
1 parent ed3ec7d commit 670839b

27 files changed

Lines changed: 549 additions & 616 deletions

configure.ac

Lines changed: 15 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -69,13 +69,13 @@ AC_ARG_ENABLE(qat_hw_gcm,
6969
AC_SUBST(enable_qat_hw_gcm)
7070

7171
AC_ARG_ENABLE(qat_hw_sha3,
72-
AS_HELP_STRING([--disable-qat_hw_sha3],
73-
[Disable qat_hw SHA3 offload]))
72+
AS_HELP_STRING([--enable-qat_hw_sha3],
73+
[Enable qat_hw SHA3 offload]))
7474
AC_SUBST(enable_qat_hw_sha3)
7575

7676
AC_ARG_ENABLE(qat_hw_chachapoly,
77-
AS_HELP_STRING([--disable-qat_hw_chachapoly],
78-
[Disable qat_hw CHACHA-POLY acceleration]))
77+
AS_HELP_STRING([--enable-qat_hw_chachapoly],
78+
[Enable qat_hw CHACHA-POLY acceleration]))
7979
AC_SUBST(enable_qat_hw_chachapoly)
8080

8181
AC_ARG_ENABLE(qat_sw_gcm,
@@ -259,11 +259,18 @@ then
259259
then
260260
AC_MSG_NOTICE([Build QAT engine against OpenSSL 3.0])
261261
AC_SUBST([cflags_openssl_3], ["-DQAT_OPENSSL_3 -DOPENSSL_SUPPRESS_DEPRECATED"])
262-
libdir="\$(with_openssl_install_dir)/lib/engines-3"
263-
AC_SUBST([openssl_version], ["3"])
262+
if test "$host_cpu" = "x86_64"
263+
then
264+
libdir="\$(with_openssl_install_dir)/lib64/engines-3"
265+
AC_SUBST([OPENSSL_LIB], ["-Wl,-rpath,\$(with_openssl_install_dir)/lib64 -L\$(with_openssl_install_dir)/lib64 -lcrypto"])
266+
else
267+
libdir="\$(with_openssl_install_dir)/lib/engines-3"
268+
AC_SUBST([OPENSSL_LIB], ["-Wl,-rpath,\$(with_openssl_install_dir)/lib -L\$(with_openssl_install_dir)/lib -lcrypto"])
269+
fi
264270
else
265271
AC_MSG_NOTICE([Build QAT engine against OpenSSL 1.1.x])
266272
libdir="\$(with_openssl_install_dir)/lib/engines-1.1"
273+
AC_SUBST([OPENSSL_LIB], ["-Wl,-rpath,\$(with_openssl_install_dir)/lib -L\$(with_openssl_install_dir)/lib -lcrypto"])
267274
if test "`grep "define OPENSSL_VERSION_NUMBER 0x101000" $with_openssl_install_dir/include/openssl/opensslv.h | wc -l`" = "1"
268275
then
269276
if test "x$with_openssl_dir" = "x"
@@ -274,7 +281,6 @@ then
274281
fi
275282
fi
276283
AC_SUBST([includes_openssl], ["-I\$(with_openssl_install_dir)/include"])
277-
AC_SUBST([OPENSSL_LIB], ["-Wl,-rpath,\$(with_openssl_install_dir)/lib -L\$(with_openssl_install_dir)/lib -lcrypto"])
278284
else
279285
AC_PATH_TOOL(PKGCONFIG, pkg-config)
280286
AS_IF([test "x$PKGCONFIG" = "x"], [AC_MSG_ERROR(pkg-config not found.)], )
@@ -575,7 +581,7 @@ fi
575581
fi
576582
fi
577583

578-
if test "x$enable_qat_hw_sha3" != "xno" -a "x$cflags_qat_hw" != "x"
584+
if test "x$enable_qat_hw_sha3" = "xyes" -a "x$cflags_qat_hw" != "x"
579585
then
580586
enable_qat_hw_sha3="-DENABLE_QAT_HW_SHA3"
581587
AC_MSG_NOTICE([Accelerating SHA3 to Hardware])
@@ -584,7 +590,7 @@ else
584590
AC_MSG_NOTICE([Not Accelerating SHA3 to Hardware])
585591
fi
586592

587-
if test "x$enable_qat_hw_chachapoly" != "xno" -a "x$cflags_qat_hw" != "x"
593+
if test "x$enable_qat_hw_chachapoly" = "xyes" -a "x$cflags_qat_hw" != "x"
588594
then
589595
enable_qat_hw_chachapoly="-DENABLE_QAT_HW_CHACHAPOLY"
590596
AC_MSG_NOTICE([Accelerating CHACHA-POLY to Hardware])

docs/config_options.md

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -139,6 +139,16 @@ The following is a list of the options that can be used with the
139139
--disable-qat_hw_ecx/--enable-qat_hw_ecx
140140
Disable/Enable Intel(R) QAT Hardware X25519/X448 acceleration (enabled by default).
141141
142+
--disable-qat_hw_sha3/--enable-qat_hw_sha3
143+
Disable/Enable Intel(R) QAT Hardware SHA-3 acceleration (disabled by default).
144+
This flag is valid only on 4xxx(QAT gen 4 devices) as the support is not available
145+
for earlier generations of QAT devices (e.g. c62x, dh895xxcc, etc.)
146+
147+
--disable-qat_hw_chachapoly/--enable-qat_hw_chachapoly
148+
Disable/Enable Intel(R) QAT Hardware CHACHA20-POLY1305 acceleration (disabled by default).
149+
This flag is valid only on 4xxx(QAT gen 4 devices) as the support is not available
150+
for earlier generations of QAT devices (e.g. c62x, dh895xxcc, etc.)
151+
142152
--disable-qat_sw_gcm/--enable-qat_sw_gcm
143153
Disable/Enable Intel(R) QAT Software vectorized AES-GCM acceleration.
144154
This flag is valid only when QAT SW acceleration is enabled using the flag

docs/features.md

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@
2222
* [HMAC Key Derivation Function (HKDF) Acceleration.](qat_hw.md#intel-qat-openssl-engine-hkdf-support)
2323
* [Pipelined Operations](qat_hw.md#using-the-openssl-pipelining-capability)
2424
* [Intel&reg; QAT OpenSSL\* Engine Software Fallback](qat_hw.md#intel-qat-openssl-engine-software-fallback-feature)
25+
* RSA8K, SHA3-224/256/384/512 and ChaCha20-Poly1305 using 4xxx (QAT gen4 devices) only.
2526

2627
## qat_sw Features
2728
* [Intel&reg; QAT Software Acceleration for Asymmetric PKE and AES-GCM](qat_sw.md)

docs/limitations.md

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -34,5 +34,9 @@
3434
with ECDSA Ciphers in the QAT Software acceleration using multithread mode
3535
in the Haproxy application. This issue is not observed when using RSA ciphers
3636
or in multi-process mode.
37+
* There is an issue in sshd daemon application when using the QAT for default openssl.
38+
sshd looks to be closing the file descriptors associated with QAT engine and driver
39+
after initialising openssl. Work around in sshd which comments out the closefrom()
40+
calls is needed to unblock the issue.
3741

3842
[1]:https://github.com/openssl/openssl/pull/2581

docs/qat_hw.md

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -94,8 +94,4 @@ QAT_SW asymmetric algorithms that are supported in the qatengine.
9494

9595
The default behaviour can be changed using corresponding algorithm's enable
9696
flags (eg:--enable-qat_sw_rsa) in which case the individual algorithms enabled
97-
(eiher qat_hw or qat_sw) in the build configure will get accelerated.
98-
99-
Note: ECDH & ECDSA can be accelerated together via QAT_HW or QAT_SW and
100-
cannot be seperated to use different acceleration due to limitation in
101-
the qatengine registration.
97+
(either qat_hw or qat_sw) in the build configure will get accelerated.

docs/software_requirements.md

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ Driver for FreeBSD. This release was validated on the following:
1010
* Kernel: GNU\*/Linux\* 3.10.0-693
1111
* Intel&reg; Communications Chipset C62X Series Software for Linux\*, version **4.14**
1212
* Intel&reg; Communications Chipset C62X Series Software for FreeBSD\*, version **3.10**
13-
* OpenSSL\* 1.1.1k
13+
* OpenSSL\* 1.1.1l
1414

1515
## qat_sw Requirements
1616
Successful operation of the Intel&reg; QAT Software acceleration requires a
@@ -31,7 +31,7 @@ This release was validated on the following:
3131
* Intel&reg; Crypto Multi-buffer library from the [ipp-crypto][1] release
3232
version **IPP Crypto 2021.3**
3333
* Intel&reg; Multi-Buffer crypto for IPsec Library release version **v1.0**
34-
* OpenSSL\* 1.1.1k
34+
* OpenSSL\* 1.1.1l
3535

3636
[1]:https://github.com/intel/ipp-crypto
3737
[2]:https://github.com/intel/ipp-crypto/tree/develop/sources/ippcp/crypto_mb

e_qat.c

Lines changed: 48 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -64,6 +64,10 @@
6464
# else
6565
# error "No memory driver type defined"
6666
# endif
67+
# ifdef QAT_HW_INTREE
68+
# define ENABLE_QAT_HW_SHA3
69+
# define ENABLE_QAT_HW_CHACHAPOLY
70+
# endif
6771
#endif
6872

6973
/* Standard Includes */
@@ -95,7 +99,6 @@
9599
# include "qat_hw_rsa.h"
96100
# include "qat_hw_dsa.h"
97101
# include "qat_hw_dh.h"
98-
# include "qat_hw_ec.h"
99102
# include "qat_hw_gcm.h"
100103

101104
/* QAT includes */
@@ -149,7 +152,10 @@
149152

150153
/* Qat engine id declaration */
151154
const char *engine_qat_id = STR(QAT_ENGINE_ID);
152-
#ifdef QAT_HW
155+
#if defined(QAT_HW) && defined(QAT_SW)
156+
const char *engine_qat_name =
157+
"Reference implementation of QAT crypto engine(qat_hw & qat_sw) v0.6.8";
158+
#elif QAT_HW
153159
const char *engine_qat_name =
154160
"Reference implementation of QAT crypto engine(qat_hw) v0.6.8";
155161
#else
@@ -162,7 +168,8 @@ int qat_hw_offload = 0;
162168
int qat_sw_offload = 0;
163169
int qat_hw_rsa_offload = 0;
164170
int qat_hw_ecx_offload = 0;
165-
int qat_hw_ec_offload = 0;
171+
int qat_hw_ecdh_offload = 0;
172+
int qat_hw_ecdsa_offload = 0;
166173
int qat_keep_polling = 1;
167174
int multibuff_keep_polling = 1;
168175
int enable_external_polling = 0;
@@ -344,15 +351,17 @@ static int qat_engine_destroy(ENGINE *e)
344351
{
345352
DEBUG("---- Destroying Engine...\n\n");
346353
#ifdef QAT_HW
347-
qat_free_EC_methods();
348354
qat_free_DH_methods();
349355
qat_free_DSA_methods();
350356
qat_free_RSA_methods();
351357
#endif
352358

353359
#ifdef QAT_SW
354360
multibuff_free_RSA_methods();
355-
mb_free_EC_methods();
361+
#endif
362+
363+
#if defined(QAT_SW) || defined(QAT_HW)
364+
qat_free_EC_methods();
356365
#endif
357366

358367
#if defined(QAT_SW_IPSEC) || defined(QAT_HW)
@@ -365,8 +374,6 @@ static int qat_engine_destroy(ENGINE *e)
365374
# endif
366375
#endif
367376

368-
qat_hw_offload = 0;
369-
qat_sw_offload = 0;
370377
QAT_DEBUG_LOG_CLOSE();
371378
ERR_unload_QAT_strings();
372379
return 1;
@@ -495,6 +502,12 @@ int qat_engine_finish_int(ENGINE *e, int reset_globals)
495502
if (reset_globals == QAT_RESET_GLOBALS) {
496503
enable_external_polling = 0;
497504
enable_heuristic_polling = 0;
505+
qat_hw_offload = 0;
506+
qat_sw_offload = 0;
507+
qat_hw_rsa_offload = 0;
508+
qat_hw_ecx_offload = 0;
509+
qat_hw_ecdh_offload = 0;
510+
qat_hw_ecdsa_offload = 0;
498511
}
499512
qat_pthread_mutex_unlock();
500513
CRYPTO_CLOSE_QAT_LOG();
@@ -556,9 +569,10 @@ int qat_engine_ctrl(ENGINE *e, int cmd, long i, void *p, void (*f) (void))
556569
BREAK_IF(!enable_external_polling, "POLL failed as external polling is not enabled\n");
557570
BREAK_IF(p == NULL, "POLL failed as the input parameter was NULL\n");
558571
#ifdef QAT_HW
559-
BREAK_IF(qat_instance_handles == NULL, "POLL failed as no instances are available\n");
560-
561-
*(int *)p = (int)poll_instances();
572+
if (qat_hw_offload) {
573+
BREAK_IF(qat_instance_handles == NULL, "POLL failed as no instances are available\n");
574+
*(int *)p = (int)poll_instances();
575+
}
562576
#endif
563577

564578
#ifdef QAT_SW
@@ -833,12 +847,16 @@ static int bind_qat(ENGINE *e, const char *id)
833847
WARN("%s - %s \n", id, engine_qat_name);
834848

835849
#ifdef QAT_HW
836-
#ifdef QAT_HW_INTREE
850+
# ifdef QAT_HW_INTREE
837851
if (icp_sal_userIsQatAvailable() == CPA_TRUE) {
838852
qat_hw_offload = 1;
839853
} else {
840854
WARN("Qat Intree device not available\n");
841-
#else
855+
# ifndef QAT_SW
856+
goto end;
857+
# endif
858+
}
859+
# else
842860
if (access(QAT_DEV, F_OK) == 0) {
843861
qat_hw_offload = 1;
844862
if (access(QAT_MEM_DEV, F_OK) != 0) {
@@ -847,8 +865,11 @@ static int bind_qat(ENGINE *e, const char *id)
847865
}
848866
} else {
849867
WARN("Qat device not available\n");
868+
# ifndef QAT_SW
869+
goto end;
870+
# endif
850871
}
851-
#endif
872+
# endif
852873
#endif
853874

854875
if (id && (strcmp(id, engine_qat_id) != 0)) {
@@ -898,13 +919,6 @@ static int bind_qat(ENGINE *e, const char *id)
898919
}
899920
# endif
900921

901-
# if defined(ENABLE_QAT_HW_ECDH) || defined(ENABLE_QAT_HW_ECDSA)
902-
if (!ENGINE_set_EC(e, qat_get_EC_methods())) {
903-
WARN("ENGINE_set_EC QAT HW failed\n");
904-
goto end;
905-
}
906-
# endif
907-
908922
# ifdef ENABLE_QAT_HW_SHA3
909923
if (!ENGINE_set_digests(e, qat_digest_methods)) {
910924
WARN("ENGINE_set_digests failed\n");
@@ -931,20 +945,6 @@ static int bind_qat(ENGINE *e, const char *id)
931945
}
932946
# endif
933947

934-
# if defined(ENABLE_QAT_SW_ECDH) || defined(ENABLE_QAT_SW_ECDSA)
935-
if (!qat_hw_ec_offload &&
936-
mbx_get_algo_info(MBX_ALGO_ECDHE_NIST_P256) &&
937-
mbx_get_algo_info(MBX_ALGO_ECDHE_NIST_P384) &&
938-
mbx_get_algo_info(MBX_ALGO_ECDSA_NIST_P256) &&
939-
mbx_get_algo_info(MBX_ALGO_ECDSA_NIST_P384)) {
940-
DEBUG("QAT SW ECDSA p256/p384 & ECDH p256/p384 Supported\n");
941-
qat_sw_offload = 1;
942-
if (!ENGINE_set_EC(e, mb_get_EC_methods())) {
943-
WARN("ENGINE_set_EC QAT SW failed\n");
944-
goto end;
945-
}
946-
}
947-
# endif
948948
#endif
949949

950950
#ifdef QAT_SW_IPSEC
@@ -959,6 +959,20 @@ static int bind_qat(ENGINE *e, const char *id)
959959
#endif
960960

961961
#if defined(QAT_HW) || defined(QAT_SW)
962+
if (!ENGINE_set_EC(e, qat_get_EC_methods())) {
963+
WARN("ENGINE_set_EC failed\n");
964+
goto end;
965+
}
966+
# if defined(ENABLE_QAT_SW_ECDH) || defined(ENABLE_QAT_SW_ECDSA)
967+
if (mbx_get_algo_info(MBX_ALGO_ECDHE_NIST_P256) &&
968+
mbx_get_algo_info(MBX_ALGO_ECDHE_NIST_P384) &&
969+
mbx_get_algo_info(MBX_ALGO_ECDSA_NIST_P256) &&
970+
mbx_get_algo_info(MBX_ALGO_ECDSA_NIST_P384)) {
971+
DEBUG("QAT SW ECDSA p256/p384 & ECDH p256/p384 Supported\n");
972+
qat_sw_offload = 1;
973+
}
974+
# endif
975+
962976
# ifndef QAT_OPENSSL_3
963977
if (!ENGINE_set_pkey_meths(e, qat_pkey_methods)) {
964978
WARN("ENGINE_set_pkey_meths failed\n");

e_qat.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -307,7 +307,8 @@ extern int qat_hw_offload;
307307
extern int qat_sw_offload;
308308
extern int qat_hw_rsa_offload;
309309
extern int qat_hw_ecx_offload;
310-
extern int qat_hw_ec_offload;
310+
extern int qat_hw_ecdh_offload;
311+
extern int qat_hw_ecdsa_offload;
311312
extern int qat_keep_polling;
312313
extern int multibuff_keep_polling;
313314
extern int enable_external_polling;

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