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iio: adc: ad9081: Add debugfs entries for JRX TPL phase adjust
Add per-link debugfs attributes "adi,tpl-phase-adjust-link0" and "adi,tpl-phase-adjust-link1" to allow runtime tuning of the JESD RX LMFC delay (TPL phase adjust) without requiring a device tree change and reboot. The attributes support both read and write access. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
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drivers/iio/adc/ad9081.c

Lines changed: 32 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -153,6 +153,8 @@ enum ad9081_debugfs_cmd {
153153
DBGFS_DEV_API_INFO,
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DBGFS_DEV_CHIP_INFO,
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DBGFS_JESD_RX_RECAL_204C,
156+
DBGFS_JRX_LMFC_DELAY_LINK0,
157+
DBGFS_JRX_LMFC_DELAY_LINK1,
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DBGFS_ENTRY_MAX,
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};
158160

@@ -3741,6 +3743,12 @@ static ssize_t ad9081_debugfs_read(struct file *file, char __user *userbuf,
37413743
len = snprintf(phy->dbuf, sizeof(phy->dbuf), "AD%X Rev. %u Grade %u\n",
37423744
conv->id, phy->chip_id.dev_revision, phy->chip_id.prod_grade);
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break;
3746+
case DBGFS_JRX_LMFC_DELAY_LINK0:
3747+
val = phy->jrx_link_tx[0].jrx_tpl_phase_adjust;
3748+
break;
3749+
case DBGFS_JRX_LMFC_DELAY_LINK1:
3750+
val = phy->jrx_link_tx[1].jrx_tpl_phase_adjust;
3751+
break;
37443752
default:
37453753
val = entry->val;
37463754
}
@@ -3947,6 +3955,26 @@ static ssize_t ad9081_debugfs_write(struct file *file,
39473955

39483956
entry->val = lv << 16 | rv;
39493957

3958+
return count;
3959+
case DBGFS_JRX_LMFC_DELAY_LINK0:
3960+
if (ret < 1)
3961+
return -EINVAL;
3962+
3963+
phy->jrx_link_tx[0].jrx_tpl_phase_adjust = val;
3964+
ret = adi_ad9081_jesd_rx_lmfc_delay_set(&phy->ad9081, AD9081_LINK_0, val);
3965+
if (ret)
3966+
return ret;
3967+
3968+
return count;
3969+
case DBGFS_JRX_LMFC_DELAY_LINK1:
3970+
if (ret < 1)
3971+
return -EINVAL;
3972+
3973+
phy->jrx_link_tx[1].jrx_tpl_phase_adjust = val;
3974+
ret = adi_ad9081_jesd_rx_lmfc_delay_set(&phy->ad9081, AD9081_LINK_1, val);
3975+
if (ret)
3976+
return ret;
3977+
39503978
return count;
39513979
default:
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break;
@@ -4031,6 +4059,10 @@ static int ad9081_post_iio_register(struct iio_dev *indio_dev)
40314059
"chip_version", DBGFS_DEV_CHIP_INFO);
40324060
ad9081_add_debugfs_entry(indio_dev,
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"jesd_rx_recalibrate_204c", DBGFS_JESD_RX_RECAL_204C);
4062+
ad9081_add_debugfs_entry(indio_dev,
4063+
"adi,tpl-phase-adjust-link0", DBGFS_JRX_LMFC_DELAY_LINK0);
4064+
ad9081_add_debugfs_entry(indio_dev,
4065+
"adi,tpl-phase-adjust-link1", DBGFS_JRX_LMFC_DELAY_LINK1);
40344066

40354067
for (i = 0; i < phy->ad9081_debugfs_entry_index; i++)
40364068
debugfs_create_file( phy->debugfs_entry[i].propname, 0644,

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