set_wire_rc and set_layer_rc

[kareefardi]

Which parts of OpenROAD benefits from these commands? I assume this affects parts related to timing such as resizer, global placement with timing mode and clock tree synthesis. I am wondering if anything else benefits from it.

In addition, I am wondering if set_layer_rc -via has any impact at all. I tried varying it but results seem to be exactly the same.

[maliberty]

Anytime we need to estimate parasitics/timing. IR-drop (psm), resistance in RCX, rmp (in the future) would be affected too.

Via resistance is usually a small component of total resistance but it should have some effect.

[kareefardi]

For RCX, is that data in ext_model_file not sufficient?

[maliberty]

I believe it is only cap modelling and resistance comes from LEF/set_layer_rc.