File tree Expand file tree Collapse file tree
flow/designs/asap7/swerv_wrapper Expand file tree Collapse file tree Original file line number Diff line number Diff line change @@ -42,8 +42,7 @@ export SYNTH_KEEP_MODULES ?= \
4242 ram_256x34
4343
4444
45- # export LIB_MODEL = CCS
46- export LIB_MODEL = NLDM
45+ export LIB_MODEL = CCS
4746
4847export VERILOG_FILES = $(DESIGN_HOME ) /src/swerv/swerv_wrapper.sv2v.v \
4948 $(DESIGN_HOME ) /$(PLATFORM ) /swerv_wrapper/macros.v \
@@ -56,7 +55,7 @@ export ADDITIONAL_LIBS = $(sort $(wildcard $(DESIGN_HOME)/$(PLATFORM)/swerv_wrap
5655export CORE_UTILIZATION = 55
5756
5857export IO_CONSTRAINTS = $(DESIGN_HOME ) /$(PLATFORM ) /swerv_wrapper/io.tcl
59- export PLACE_DENSITY_LB_ADDON = 0.20
58+ export PLACE_DENSITY_LB_ADDON = 0.30
6059
6160export ROUTING_LAYER_ADJUSTMENT = 0.2
6261
Original file line number Diff line number Diff line change @@ -2,7 +2,7 @@ current_design swerv_wrapper
22
33set clk_name core_clock
44set clk_port_name clk
5- set clk_period 1300
5+ set clk_period 1100
66
77# Match the old set_input/output_delay = 0.2 * clk_period budget, as
88# optimization targets only (no set_input/output_delay — see rationale in
Original file line number Diff line number Diff line change 3838 "compare" : " <="
3939 },
4040 "cts__timing__setup__ws" : {
41- "value" : -168 .0 ,
41+ "value" : -401 .0 ,
4242 "compare" : " >="
4343 },
4444 "cts__timing__setup__tns" : {
45- "value" : -2010 .0 ,
45+ "value" : -61200 .0 ,
4646 "compare" : " >="
4747 },
4848 "cts__timing__hold__ws" : {
49- "value" : -65 .0 ,
49+ "value" : -55 .0 ,
5050 "compare" : " >="
5151 },
5252 "cts__timing__hold__tns" : {
53- "value" : -260 .0 ,
53+ "value" : -220 .0 ,
5454 "compare" : " >="
5555 },
5656 "globalroute__antenna_diodes_count" : {
5757 "value" : 100 ,
5858 "compare" : " <="
5959 },
6060 "globalroute__timing__setup__ws" : {
61- "value" : -204 .0 ,
61+ "value" : -395 .0 ,
6262 "compare" : " >="
6363 },
6464 "globalroute__timing__setup__tns" : {
65- "value" : -3000 .0 ,
65+ "value" : -51200 .0 ,
6666 "compare" : " >="
6767 },
6868 "globalroute__timing__hold__ws" : {
69- "value" : -65 .0 ,
69+ "value" : -55 .0 ,
7070 "compare" : " >="
7171 },
7272 "globalroute__timing__hold__tns" : {
73- "value" : -260 .0 ,
73+ "value" : -220 .0 ,
7474 "compare" : " >="
7575 },
7676 "detailedroute__route__wirelength" : {
9090 "compare" : " <="
9191 },
9292 "finish__timing__setup__ws" : {
93- "value" : -170 .0 ,
93+ "value" : -375 .0 ,
9494 "compare" : " >="
9595 },
9696 "finish__timing__setup__tns" : {
97- "value" : -2470 .0 ,
97+ "value" : -49100 .0 ,
9898 "compare" : " >="
9999 },
100100 "finish__timing__hold__ws" : {
101- "value" : -65 .0 ,
101+ "value" : -55 .0 ,
102102 "compare" : " >="
103103 },
104104 "finish__timing__hold__tns" : {
105- "value" : -260 .0 ,
105+ "value" : -220 .0 ,
106106 "compare" : " >="
107107 },
108108 "finish__design__instance__area" : {
You can’t perform that action at this time.
0 commit comments