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Commit 43289d0

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Fix warning
1 parent 917f62d commit 43289d0

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src/logic_locking_analyzer.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -787,7 +787,7 @@ dict<Cell *, std::vector<std::uint64_t>> LogicLockingAnalyzer::compute_internal_
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ret.emplace(cells[i], std::vector<std::uint64_t>());
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}
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for (int i = 0; i < nb_test_vectors(); ++i) {
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auto no_toggle = aig_.simulate(test_vectors_[i]);
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aig_.simulate(test_vectors_[i]);
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for (int s = 0; s < GetSize(signals); ++s) {
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Lit l = wire_to_aig_.at(signals[s]);
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std::uint64_t val = aig_.getValue(l);
@@ -1047,4 +1047,4 @@ std::vector<double> LogicLockingAnalyzer::compute_KIP(const std::vector<Cell *>
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ret.push_back(kip);
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}
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return ret;
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}
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}

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