As we have observed:
- The Register list are some time have the same name but difference value between chip generations
- The sometime it duplicates
- Need to be sorted and put into a category
I suggest that we create a macro that allows us to define the register like below:
#ifndef EVE_REG_NOT_AVAILABLE
#define EVE_REG_NOT_AVAILABLE 0ul
#endif
#ifndef DECLARE_REG
#define DECLARE_REG(a1, a2, a3, a4, a5) \
((EVE_API == 1) ? (uint32_t)(a1) : (EVE_API == 2) ? (uint32_t)(a2) \
: (EVE_API == 3) ? (uint32_t)(a3) \
: (EVE_API == 4) ? (uint32_t)(a4) \
: (uint32_t)(a5))
#endif
Example when using it:
/** @brief Pixel clock frequency divider
* @note Not present on EVE5 (BT820 uses a different clock architecture). */
#define EVE_REG_PCLK DECLARE_REG(0x10246cul, 0x302070ul, 0x302070ul, 0x302070ul, EVE_REG_NOT_AVAILABLE)
/** @brief Pixel clock polarity (0 = rising edge, 1 = falling edge) */
#define EVE_REG_PCLK_POL DECLARE_REG(0x102468ul, 0x30206cul, 0x30206cul, 0x30206cul, 0x7f0060b8ul)
/** @brief Horizontal total cycle count */
#define EVE_REG_HCYCLE DECLARE_REG(0x102428ul, 0x30202cul, 0x30202cul, 0x30202cul, 0x7f00608cul)
We faced issues:
- Some parts still need a manual to lock like this:
#if IS_EVE_API(5)
HAL_MemWrite32(EVE_REG_DISP, 1);
#endif
So we still can fixed it manually.
As we have observed:
I suggest that we create a macro that allows us to define the register like below:
Example when using it:
We faced issues:
So we still can fixed it manually.